Model { Name "DARM" Version 7.5 MdlSubVersion 0 GraphicalInterface { NumRootInports 3 Inport { Name "DARM_EXC [m]" } Inport { Name "DARM_CTRL_EXC [m]" } Inport { Name "External Delta L [m]" } NumRootOutports 4 Outport { BusObject "" BusOutputAsStruct "off" Name "DARM_IN1 [m]" } Outport { BusObject "" BusOutputAsStruct "off" Name "DARM_IN2 [m]" } Outport { BusObject "" BusOutputAsStruct "off" Name "DARM_CTRL [m]" } Outport { BusObject "" BusOutputAsStruct "off" Name "Delta L [m]" } ParameterArgumentNames "" ComputedModelVersion "1.164" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "UTF-8" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 Created "Wed Feb 27 16:39:57 2013" Creator "kissel" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "controls" ModifiedDateFormat "%" LastModifiedDate "Wed Aug 21 22:57:00 2013" RTWModifiedTimeStamp 299026252 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "user" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.10.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.10.0" StartTime "0.0" StopTime "10.0" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.10.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.10.0" Array { Type "Cell" Dimension 8 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" Cell "UseSpecifiedMinMax" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off EnforceIntegerDowncast on ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.10.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.10.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.10.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 8 Version "1.10.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.10.0" Array { Type "Cell" Dimension 8 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" Cell "GenerateSLWebview" Cell "GenerateCodeMetricsReport" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.10.0" Array { Type "Cell" Dimension 21 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "InsertPolySpaceComments" Cell "SFDataObjDesc" Cell "MATLABFcnDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M_T" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.10.0" Array { Type "Cell" Dimension 16 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "PortableWordSizes" Cell "PurelyIntegerCode" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "GenerateAllocFcn" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition " [ 400, 199, 1280, 829 ] " } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } WSMdlFileData "DataTag0" BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType Demux Outputs "4" DisplayOption "none" BusSelectionMode off } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParamMin "[]" ParamMax "[]" ParameterDataTypeMode "Same as input" ParameterDataType "fixdt(1,16,0)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "[]" ParamDataTypeStr "Inherit: Same as input" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Ground } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Math Operator "exp" OutputSignalType "auto" SampleTime "-1" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on IntermediateResultsDataTypeStr "Inherit: Inherit via internal rule" AlgorithmType "Newton-Raphson" Iterations "3" } Block { BlockType Mux Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Switch Criteria "u2 >= Threshold" Threshold "0" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Inherit via internal rule" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on ZeroCross on SampleTime "-1" AllowDiffInputSizes off } Block { BlockType Terminator } Block { BlockType ZeroPole Zeros "[1]" Poles "[0 1]" Gain "[1]" AbsoluteTolerance "auto" ContinuousStateAttributes "''" } } System { Name "DARM" Location [377, 154, 1200, 683] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" SIDHighWatermark 5709 Block { BlockType Inport Name "DARM_EXC [m]" SID 537 Position [443, 380, 457, 410] BlockRotation 270 BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "DARM_CTRL_EXC [m]" SID 2972 Position [143, 380, 157, 410] BlockRotation 270 BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "External Delta L [m]" SID 1857 Position [313, 5, 327, 35] BlockRotation 270 BlockMirror on BackgroundColor "yellow" NamePlacement "alternate" Port "3" IconDisplay "Port number" } Block { BlockType SubSystem Name "Actuation Function" SID 1847 Ports [1, 1] Position [45, 96, 235, 164] BackgroundColor "[0.749020, 0.749020, 0.749020]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Actuation Function" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "DARM_CTRL_IN [m]" SID 1848 Position [65, 73, 95, 87] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "ETMX" SID 840 Ports [1, 1] Position [305, 34, 505, 76] BackgroundColor "[0.750000, 0.750000, 0.750000]" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ETMX" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ETMX_CTRL_IN [m]" SID 853 Position [45, 713, 75, 727] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "Cavity Misalignments" SID 498 Ports [6, 1] Position [990, 629, 1145, 801] BackgroundColor "[0.900000, 0.600300, 0.600300]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Cavity Misalignments" Location [102, 80, 831, 952] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TST_L_Disp [m]" SID 514 Position [45, 38, 75, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "TST_T_Disp [m]" SID 506 Position [45, 98, 75, 112] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "TST_V_Disp [m]" SID 499 Position [45, 168, 75, 182] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TST_R_Disp [rad]" SID 505 Position [45, 238, 75, 252] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "TST_P_Disp [rad]" SID 501 Position [45, 308, 75, 322] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "TST_Y_Disp [rad]" SID 503 Position [45, 378, 75, 392] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Product Name "BeamMisalignment\nP2L [m/rad]" SID 493 Ports [2, 1] Position [250, 307, 280, 338] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "BeamMisalignment\nY2L [m/rad]" SID 494 Ports [2, 1] Position [250, 377, 280, 408] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "EarthCurvature\nV2L [m/m]" SID 492 Ports [2, 1] Position [250, 167, 280, 198] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "P2L" SID 496 Position [115, 323, 150, 337] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.P2L" } Block { BlockType Constant Name "R2L" SID 509 Position [115, 253, 150, 267] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.R2L" } Block { BlockType Product Name "R2L [m/rad]" SID 507 Ports [2, 1] Position [250, 237, 280, 268] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 513 Ports [6, 1] Position [400, 14, 420, 426] ShowName off Inputs "++++++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "T2L" SID 510 Position [115, 113, 150, 127] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.T2L" } Block { BlockType Product Name "T2L [m/m]" SID 508 Ports [2, 1] Position [250, 97, 280, 128] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "V2L" SID 495 Position [115, 183, 150, 197] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.V2L" } Block { BlockType Constant Name "Y2L" SID 497 Position [115, 393, 150, 407] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.P2L" } Block { BlockType Outport Name "TestMass_L_Displacement [m]" SID 512 Position [485, 213, 515, 227] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "V2L" SrcPort 1 DstBlock "EarthCurvature\nV2L [m/m]" DstPort 2 } Line { SrcBlock "P2L" SrcPort 1 DstBlock "BeamMisalignment\nP2L [m/rad]" DstPort 2 } Line { SrcBlock "Y2L" SrcPort 1 DstBlock "BeamMisalignment\nY2L [m/rad]" DstPort 2 } Line { SrcBlock "TST_V_Disp [m]" SrcPort 1 DstBlock "EarthCurvature\nV2L [m/m]" DstPort 1 } Line { SrcBlock "TST_P_Disp [rad]" SrcPort 1 DstBlock "BeamMisalignment\nP2L [m/rad]" DstPort 1 } Line { SrcBlock "TST_Y_Disp [rad]" SrcPort 1 DstBlock "BeamMisalignment\nY2L [m/rad]" DstPort 1 } Line { SrcBlock "R2L" SrcPort 1 DstBlock "R2L [m/rad]" DstPort 2 } Line { SrcBlock "T2L" SrcPort 1 DstBlock "T2L [m/m]" DstPort 2 } Line { SrcBlock "TST_R_Disp [rad]" SrcPort 1 DstBlock "R2L [m/rad]" DstPort 1 } Line { SrcBlock "TST_T_Disp [m]" SrcPort 1 DstBlock "T2L [m/m]" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "TestMass_L_Displacement [m]" DstPort 1 } Line { SrcBlock "TST_L_Disp [m]" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "T2L [m/m]" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "EarthCurvature\nV2L [m/m]" SrcPort 1 DstBlock "Sum1" DstPort 3 } Line { SrcBlock "R2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 4 } Line { SrcBlock "BeamMisalignment\nP2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 5 } Line { SrcBlock "BeamMisalignment\nY2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 6 } } } Block { BlockType SubSystem Name "Damping Loops" SID 257 Ports [6, 6] Position [240, 210, 445, 375] BackgroundColor "lightBlue" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Damping Loops" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP_L_DISP_IN [m]" SID 263 Position [65, 78, 95, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_T_DISP_IN [m]" SID 262 Position [65, 138, 95, 152] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_V_DISP_IN [m]" SID 261 Position [65, 198, 95, 212] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_R_DISP_IN [rad]" SID 258 Position [65, 258, 95, 272] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_P_DISP_IN [rad]" SID 259 Position [65, 318, 95, 332] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_Y_DISP_IN [rad]" SID 260 Position [65, 378, 95, 392] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "BosemL" SID 5699 Tag "NbNoiseSource" Ports [0, 1] Position [127, 20, 143, 45] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'BOSEM L'" asd "ifoParams.darmNb.bosem" } Block { BlockType Reference Name "DAMP L" SID 383 Ports [1, 1] Position [170, 65, 395, 105] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(1).ss" IC "[]" } Block { BlockType Reference Name "DAMP P" SID 387 Ports [1, 1] Position [170, 306, 395, 344] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(5).ss" IC "[]" } Block { BlockType Reference Name "DAMP R" SID 386 Ports [1, 1] Position [170, 246, 395, 284] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(4).ss" IC "[]" } Block { BlockType Reference Name "DAMP T" SID 384 Ports [1, 1] Position [170, 126, 395, 164] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(2).ss" IC "[]" } Block { BlockType Reference Name "DAMP V" SID 385 Ports [1, 1] Position [170, 186, 395, 224] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(3).ss" IC "[]" } Block { BlockType Reference Name "DAMP Y" SID 388 Ports [1, 1] Position [170, 366, 395, 404] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(6).ss" IC "[]" } Block { BlockType Sum Name "Sum2" SID 5700 Ports [2, 1] Position [125, 75, 145, 95] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_L_DRIVE_OUT [N]" SID 380 Position [450, 78, 480, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_T_DRIVE_OUT [N]" SID 379 Position [450, 138, 480, 152] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_V_DRIVE_OUT [N]" SID 378 Position [450, 198, 480, 212] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_R_DRIVE_OUT [N.m]" SID 375 Position [450, 258, 480, 272] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_P_DRIVE_OUT [N.m]" SID 376 Position [450, 318, 480, 332] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_Y_DRIVE_OUT [N.m]" SID 377 Position [450, 378, 480, 392] BackgroundColor "orange" Port "6" IconDisplay "Port number" } Line { SrcBlock "DAMP L" SrcPort 1 DstBlock "TOP_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP T" SrcPort 1 DstBlock "TOP_T_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP V" SrcPort 1 DstBlock "TOP_V_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP R" SrcPort 1 DstBlock "TOP_R_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "DAMP P" SrcPort 1 DstBlock "TOP_P_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "DAMP Y" SrcPort 1 DstBlock "TOP_Y_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "TOP_T_DISP_IN [m]" SrcPort 1 DstBlock "DAMP T" DstPort 1 } Line { SrcBlock "TOP_V_DISP_IN [m]" SrcPort 1 DstBlock "DAMP V" DstPort 1 } Line { SrcBlock "TOP_R_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP R" DstPort 1 } Line { SrcBlock "TOP_P_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP P" DstPort 1 } Line { SrcBlock "TOP_Y_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP Y" DstPort 1 } Line { SrcBlock "TOP_L_DISP_IN [m]" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "DAMP L" DstPort 1 } Line { SrcBlock "BosemL" SrcPort 1 DstBlock "Sum2" DstPort 1 } } } Block { BlockType Ground Name "Ground" SID 515 Position [705, 399, 725, 411] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground1" SID 516 Position [705, 424, 725, 436] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground10" SID 526 Position [705, 699, 725, 711] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground11" SID 527 Position [705, 724, 725, 736] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground12" SID 528 Position [705, 749, 725, 761] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground13" SID 529 Position [705, 774, 725, 786] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground14" SID 530 Position [705, 799, 725, 811] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground15" SID 1346 Position [705, 99, 725, 111] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground16" SID 1347 Position [705, 124, 725, 136] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground17" SID 1348 Position [705, 149, 725, 161] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground18" SID 1349 Position [705, 174, 725, 186] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground19" SID 1350 Position [705, 199, 725, 211] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground2" SID 517 Position [705, 449, 725, 461] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground20" SID 1351 Position [705, 74, 725, 86] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground3" SID 518 Position [705, 474, 725, 486] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground4" SID 519 Position [705, 499, 725, 511] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground5" SID 521 Position [705, 549, 725, 561] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground6" SID 522 Position [705, 574, 725, 586] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground7" SID 523 Position [705, 599, 725, 611] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground8" SID 524 Position [705, 624, 725, 636] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground9" SID 525 Position [705, 649, 725, 661] BackgroundColor "red" ShowName off } Block { BlockType SubSystem Name "Hierarchy Loops" SID 828 Ports [1, 4] Position [245, 619, 445, 821] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Hierarchy Loops" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_ETMX_IN [m]" SID 838 Position [25, 248, 55, 262] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "Actuator-to-Euler Transform" SID 590 Ports [4, 4] Position [1395, 50, 1545, 345] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Actuator-to-Euler Transform" Location [1079, 45, 1543, 1019] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP_OSEM_IN [N]" SID 591 Position [65, 48, 95, 62] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_OSEM_IN [N]" SID 592 Position [65, 123, 95, 137] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_OSEM_IN [N]" SID 593 Position [65, 198, 95, 212] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TST_OSEM_IN [N]" SID 594 Position [65, 273, 95, 287] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 595 Position [145, 264, 180, 296] BackgroundColor "cyan" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 596 Position [145, 39, 180, 71] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "2" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 597 Position [145, 114, 180, 146] BackgroundColor "green" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain5" SID 598 Position [145, 189, 180, 221] BackgroundColor "red" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_L_OUT [N]" SID 599 Position [230, 48, 260, 62] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_OUT [N]" SID 600 Position [230, 123, 260, 137] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_OUT [N]" SID 601 Position [230, 198, 260, 212] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_OUT [N]" SID 602 Position [230, 273, 260, 287] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "TOP_OSEM_IN [N]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "TOP_L_OUT [N]" DstPort 1 } Line { SrcBlock "UIM_OSEM_IN [N]" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "UIM_L_OUT [N]" DstPort 1 } Line { SrcBlock "PUM_OSEM_IN [N]" SrcPort 1 DstBlock "Gain5" DstPort 1 } Line { SrcBlock "Gain5" SrcPort 1 DstBlock "PUM_L_OUT [N]" DstPort 1 } Line { SrcBlock "TST_OSEM_IN [N]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "TST_L_OUT [N]" DstPort 1 } Annotation { Name "4 coil-magnet\nactuators" Position [163, 175] } Annotation { Name "4 coil-magnet\nactuators" Position [163, 100] } Annotation { Name "2 coil-magnet\nactuators" Position [163, 25] } Annotation { Name "4 ESD Quadrants" Position [163, 255] } } } Block { BlockType SubSystem Name "Anti-Aliasing Chassis" SID 1868 Ports [5, 5] Position [940, 47, 1080, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Anti-Aliasing Chassis" Location [274, 45, 895, 1133] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP In [V[" SID 1869 Position [60, 58, 90, 72] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM In [V]" SID 1870 Position [60, 123, 90, 137] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM In [V]" SID 1871 Position [60, 188, 90, 202] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Ctrl In [V]" SID 1872 Position [60, 258, 90, 272] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Bias In [V]" SID 1873 Position [60, 328, 90, 342] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 1874 Position [170, 40, 245, 90] BackgroundColor "[0.000000, 0.400000, 1.000000]" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 1875 Position [170, 105, 245, 155] BackgroundColor "green" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 1876 Position [170, 170, 245, 220] BackgroundColor "red" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 1877 Position [170, 240, 245, 290] BackgroundColor "cyan" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 1878 Position [170, 310, 245, 360] BackgroundColor "cyan" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP Out [V]" SID 1879 Position [310, 58, 340, 72] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [V]" SID 1880 Position [310, 123, 340, 137] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out[V]" SID 1881 Position [310, 188, 340, 202] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out V]" SID 1882 Position [310, 258, 340, 272] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out [V]" SID 1883 Position [310, 328, 340, 342] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "UIM Out [V]" DstPort 1 } Line { SrcBlock "UIM In [V]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "PUM Out[V]" DstPort 1 } Line { SrcBlock "PUM In [V]" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "TOP Out [V]" DstPort 1 } Line { SrcBlock "TOP In [V[" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "ESD Ctrl Out V]" DstPort 1 } Line { SrcBlock "ESD Ctrl In [V]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "ESD Bias Out [V]" DstPort 1 } Line { SrcBlock "ESD Bias In [V]" SrcPort 1 DstBlock "Gain4" DstPort 1 } } } Block { BlockType SubSystem Name "COILOUTF" SID 693 Ports [5, 5] Position [605, 47, 745, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "COILOUTF" Location [12, 45, 1544, 1393] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0_IN [ct]" SID 694 Position [30, 78, 60, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1_IN [ct]" SID 695 Position [30, 183, 60, 197] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2_IN [ct]" SID 696 Position [30, 293, 60, 307] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3_CTRL_IN [ct]" SID 697 Position [30, 383, 60, 397] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "L3_BIAS_IN [ct]" SID 698 Position [30, 413, 60, 427] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "L1" SID 727 Ports [1, 1] Position [250, 160, 340, 220] BackgroundColor "green" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L1" Location [160, 139, 1650, 1052] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 728 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 734 Position [385, 39, 440, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 735 Position [665, 74, 720, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch2" SID 736 Position [955, 109, 1010, 211] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcq\n[10:1]" SID 733 Position [1065, 132, 1170, 188] BackgroundColor "green" Zeros "-2*pi*[300]" Poles "-2*pi*[50]" Gain "[50/300]" } Block { BlockType ZeroPole Name "antiLP1\n[1:10.5]" SID 730 Position [195, 27, 300, 83] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType ZeroPole Name "antiLP2\n[1:10.5]" SID 746 Position [475, 62, 580, 118] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType ZeroPole Name "antiLP3\n[1:10.5]" SID 747 Position [755, 97, 860, 153] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType Constant Name "drivers.uim.state.lp1" SID 737 Position [315, 79, 350, 101] Value "ifoParams.act.drivers.uim.state.lp1" } Block { BlockType Constant Name "drivers.uim.state.lp2" SID 738 Position [595, 114, 630, 136] Value "ifoParams.act.drivers.uim.state.lp2" } Block { BlockType Constant Name "drivers.uim.state.lp3" SID 739 Position [885, 149, 920, 171] Value "ifoParams.act.drivers.uim.state.lp3" } Block { BlockType Outport Name "Out [ct]" SID 740 Position [1225, 153, 1255, 167] IconDisplay "Port number" } Line { SrcBlock "drivers.uim.state.lp1" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "antiLP1\n[1:10.5]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Switch" SrcPort 1 Points [10, 0] Branch { Points [0, 70] DstBlock "Switch1" DstPort 3 } Branch { DstBlock "antiLP2\n[1:10.5]" DstPort 1 } } Line { SrcBlock "antiLP2\n[1:10.5]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp2" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "Switch1" SrcPort 1 Points [10, 0] Branch { Points [0, 70] DstBlock "Switch2" DstPort 3 } Branch { DstBlock "antiLP3\n[1:10.5]" DstPort 1 } } Line { SrcBlock "antiLP3\n[1:10.5]" SrcPort 1 DstBlock "Switch2" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp3" SrcPort 1 DstBlock "Switch2" DstPort 2 } Line { SrcBlock "In [ct]" SrcPort 1 Points [110, 0] Branch { DstBlock "antiLP1\n[1:10.5]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "Switch2" SrcPort 1 DstBlock "antiAcq\n[10:1]" DstPort 1 } Line { SrcBlock "antiAcq\n[10:1]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [124, 197] } } } Block { BlockType SubSystem Name "L2" SID 751 Ports [1, 1] Position [250, 270, 340, 330] BackgroundColor "red" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L2" Location [12, 289, 1093, 1314] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 752 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 757 Position [445, 39, 500, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 758 Position [825, 74, 880, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcqOff\n[110:12]" SID 764 Position [585, 134, 705, 186] BackgroundColor "green" Zeros "-2*pi*[110]" Poles "-2*pi*[12]" Gain "12/110" } Block { BlockType ZeroPole Name "antiAcqOn\n[80.5:1.35]" SID 765 Position [585, 64, 705, 116] BackgroundColor "green" NamePlacement "alternate" Zeros "-2*pi*[80.5]" Poles "-2*pi*[1.35]" Gain "1.35/80.5" } Block { BlockType ZeroPole Name "antiLpOn\n[(0.5 250):(6 20)]" SID 756 Position [190, 28, 360, 82] BackgroundColor "green" Zeros "-2*pi*[0.5 250]" Poles "-2*pi*[6 20]" Gain "(6*20)/(0.5*250)" } Block { BlockType Constant Name "drivers.pum.state.lp" SID 759 Position [375, 79, 410, 101] Value "ifoParams.act.drivers.pum.state.lp" } Block { BlockType Constant Name "drivers.top.state.acq" SID 760 Position [755, 114, 790, 136] Value "ifoParams.act.drivers.pum.state.acq" } Block { BlockType Outport Name "Out [ct]" SID 761 Position [905, 118, 935, 132] IconDisplay "Port number" } Line { SrcBlock "drivers.pum.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Switch" SrcPort 1 Points [35, 0] Branch { DstBlock "antiAcqOn\n[80.5:1.35]" DstPort 1 } Branch { Points [0, 70] DstBlock "antiAcqOff\n[110:12]" DstPort 1 } } Line { SrcBlock "antiAcqOn\n[80.5:1.35]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.top.state.acq" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "In [ct]" SrcPort 1 Points [105, 0] Branch { DstBlock "antiLpOn\n[(0.5 250):(6 20)]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "antiLpOn\n[(0.5 250):(6 20)]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "antiAcqOff\n[110:12]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [119, 217] } } } Block { BlockType SubSystem Name "L3" SID 699 Ports [2, 2] Position [250, 375, 340, 435] BackgroundColor "cyan" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L3" Location [547, 175, 1106, 1195] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Ctrl In [V]" SID 700 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "Bias In [V]" SID 701 Position [25, 138, 55, 152] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Ctrl Out [V]" SID 706 Position [340, 48, 370, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Bias Out [V]" SID 707 Position [340, 138, 370, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "Ctrl In [V]" SrcPort 1 DstBlock "Ctrl Out [V]" DstPort 1 } Line { SrcBlock "Bias In [V]" SrcPort 1 DstBlock "Bias Out [V]" DstPort 1 } Annotation { Name "2 kHz Pole is not digitally compensated " Position [204, 191] } } } Block { BlockType SubSystem Name "M0" SID 719 Ports [1, 1] Position [250, 55, 340, 115] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "M0" Location [12, 45, 1544, 1393] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [ct]" SID 720 Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 724 Position [390, 74, 445, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcq\n[1:31]" SID 723 Position [520, 96, 605, 154] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[31]" Gain "[31/1]" } Block { BlockType ZeroPole Name "antiLP\n[1:10]" SID 722 Position [220, 61, 305, 119] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10]" Gain "[10/1]" } Block { BlockType Constant Name "drivers.top.state.lp" SID 725 Position [320, 114, 355, 136] Value "ifoParams.act.drivers.top.state.lp" } Block { BlockType Outport Name "Out [ct]" SID 726 Position [660, 118, 690, 132] IconDisplay "Port number" } Line { SrcBlock "Switch" SrcPort 1 DstBlock "antiAcq\n[1:31]" DstPort 1 } Line { SrcBlock "antiLP\n[1:10]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "In [ct]" SrcPort 1 Points [115, 0] Branch { DstBlock "antiLP\n[1:10]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "antiAcq\n[1:31]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "drivers.top.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [109, 232] } } } Block { BlockType Outport Name "M0_OUT [ct]" SID 741 Position [540, 78, 570, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "L1_OUT [ct]" SID 742 Position [540, 183, 570, 197] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "L2_OUT [ct]" SID 743 Position [540, 293, 570, 307] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "L3_CTRL_OUT [ct]" SID 744 Position [540, 383, 570, 397] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "L3_BIAS_OUT [ct]" SID 745 Position [540, 413, 570, 427] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "M0" SrcPort 1 DstBlock "M0_OUT [ct]" DstPort 1 } Line { SrcBlock "M0_IN [ct]" SrcPort 1 DstBlock "M0" DstPort 1 } Line { SrcBlock "L2_IN [ct]" SrcPort 1 DstBlock "L2" DstPort 1 } Line { SrcBlock "L1_IN [ct]" SrcPort 1 DstBlock "L1" DstPort 1 } Line { SrcBlock "L3" SrcPort 1 DstBlock "L3_CTRL_OUT [ct]" DstPort 1 } Line { SrcBlock "L3_CTRL_IN [ct]" SrcPort 1 DstBlock "L3" DstPort 1 } Line { SrcBlock "L1" SrcPort 1 DstBlock "L1_OUT [ct]" DstPort 1 } Line { SrcBlock "L2" SrcPort 1 DstBlock "L2_OUT [ct]" DstPort 1 } Line { SrcBlock "L3" SrcPort 2 DstBlock "L3_BIAS_OUT [ct]" DstPort 1 } Line { SrcBlock "L3_BIAS_IN [ct]" SrcPort 1 DstBlock "L3" DstPort 2 } Annotation { Name "See T1100378 and LLO aLOG 4495 for reference" Position [142, 22] } } } Block { BlockType SubSystem Name "DAC" SID 1 Ports [5, 5] Position [770, 47, 910, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DAC" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0 In [cts]" SID 2 Position [60, 58, 90, 72] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1 In [cts]" SID 3 Position [60, 148, 90, 162] BackgroundColor "[0.909804, 0.819608, 0.321569]" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2 In [cts]" SID 4 Position [60, 238, 90, 252] BackgroundColor "[0.909804, 0.819608, 0.321569]" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3 Ctrl In [cts]" SID 11 Position [60, 333, 90, 347] BackgroundColor "[0.909804, 0.819608, 0.321569]" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "L3 Bias In [cts]" SID 116 Position [60, 403, 90, 417] BackgroundColor "[0.909804, 0.819608, 0.321569]" Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 5 Position [355, 40, 430, 90] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 6 Position [355, 130, 430, 180] BackgroundColor "[0.000000, 0.819608, 0.000000]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 7 Position [355, 220, 430, 270] BackgroundColor "[0.901961, 0.000000, 0.000000]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 12 Position [355, 315, 430, 365] BackgroundColor "[0.000000, 0.819608, 0.819608]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 117 Position [355, 385, 430, 435] BackgroundColor "[0.000000, 0.819608, 0.819608]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "IOP Upsampling L1" SID 5289 Ports [1, 1] Position [185, 140, 265, 170] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.cdsUpsamplingFilter_16kto64k.ss" IC "[]" } Block { BlockType Reference Name "IOP Upsampling L2" SID 5290 Ports [1, 1] Position [185, 230, 265, 260] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.cdsUpsamplingFilter_16kto64k.ss" IC "[]" } Block { BlockType Reference Name "IOP Upsampling L3 BIAS" SID 5292 Ports [1, 1] Position [185, 395, 265, 425] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.cdsUpsamplingFilter_16kto64k.ss" IC "[]" } Block { BlockType Reference Name "IOP Upsampling L3 CTRL" SID 5291 Ports [1, 1] Position [185, 325, 265, 355] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.cdsUpsamplingFilter_16kto64k.ss" IC "[]" } Block { BlockType Reference Name "IOP Upsampling M0" SID 5288 Ports [1, 1] Position [185, 50, 265, 80] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.cdsUpsamplingFilter_16kto64k.ss" IC "[]" } Block { BlockType Reference Name "PumDac" SID 5545 Tag "NbNoiseSource" Ports [0, 1] Position [507, 185, 523, 210] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadPumDac" } Block { BlockType Sum Name "Sum" SID 5542 Ports [2, 1] Position [505, 55, 525, 75] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 5544 Ports [2, 1] Position [505, 145, 525, 165] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5546 Ports [2, 1] Position [505, 235, 525, 255] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "TopDac" SID 5541 Tag "NbNoiseSource" Ports [0, 1] Position [507, 5, 523, 30] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadTopDac" } Block { BlockType Reference Name "UimDac" SID 5543 Tag "NbNoiseSource" Ports [0, 1] Position [507, 95, 523, 120] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadUimDac" } Block { BlockType Outport Name "TOP Out [V]" SID 8 Position [610, 58, 640, 72] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [V]" SID 9 Position [610, 148, 640, 162] BackgroundColor "[1.000000, 0.501961, 0.000000]" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out[V]" SID 10 Position [610, 238, 640, 252] BackgroundColor "[1.000000, 0.501961, 0.000000]" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out V]" SID 13 Position [610, 333, 640, 347] BackgroundColor "[1.000000, 0.501961, 0.000000]" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out [V]" SID 118 Position [610, 403, 640, 417] BackgroundColor "[1.000000, 0.501961, 0.000000]" Port "5" IconDisplay "Port number" } Line { SrcBlock "L1 In [cts]" SrcPort 1 DstBlock "IOP Upsampling L1" DstPort 1 } Line { SrcBlock "L2 In [cts]" SrcPort 1 DstBlock "IOP Upsampling L2" DstPort 1 } Line { SrcBlock "L3 Ctrl In [cts]" SrcPort 1 DstBlock "IOP Upsampling L3 CTRL" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "ESD Bias Out [V]" DstPort 1 } Line { SrcBlock "L3 Bias In [cts]" SrcPort 1 DstBlock "IOP Upsampling L3 BIAS" DstPort 1 } Line { SrcBlock "M0 In [cts]" SrcPort 1 DstBlock "IOP Upsampling M0" DstPort 1 } Line { SrcBlock "IOP Upsampling M0" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "IOP Upsampling L1" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "IOP Upsampling L2" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "IOP Upsampling L3 CTRL" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "IOP Upsampling L3 BIAS" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "TOP Out [V]" DstPort 1 } Line { SrcBlock "TopDac" SrcPort 1 DstBlock "Sum" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "UimDac" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "UIM Out [V]" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "PumDac" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "PUM Out[V]" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "ESD Ctrl Out V]" DstPort 1 } Annotation { Name "ifoParams.act.dacGain \n[V/ct]" Position [389, 27] } Annotation { Name "16k to 64k Upsampling Filter" Position [222, 19] } } } Block { BlockType SubSystem Name "Driver Electronics" SID 620 Ports [5, 5] Position [1110, 47, 1245, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Driver Electronics" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP In [V]" SID 621 Position [30, 78, 60, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM In [V]" SID 622 Position [30, 183, 60, 197] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM In [V]" SID 623 Position [30, 293, 60, 307] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Ctrl In [V]" SID 624 Position [30, 383, 60, 397] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Bias In [V]" SID 625 Position [30, 413, 60, 427] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "ESD Driver" SID 626 Ports [2, 2] Position [250, 375, 340, 435] BackgroundColor "cyan" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ESD Driver" Location [12, 45, 884, 1324] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Ctrl In [V]" SID 627 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "Bias In [V]" SID 628 Position [25, 138, 55, 152] Port "2" IconDisplay "Port number" } Block { BlockType Gain Name "DC Gain1" SID 629 Position [80, 123, 145, 167] Gain "1.1" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "DC Gain3" SID 630 Position [80, 33, 145, 77] Gain "1.1" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L3_ESD_filter\n[(none):(2000)]" SID 631 Position [205, 28, 315, 82] BackgroundColor "green" Zeros "[]" Poles "-2*pi*[2000]" Gain "[2*pi*2000]" } Block { BlockType ZeroPole Name "L3_ESD_filter\n[(none):(2000)]1" SID 632 Position [205, 118, 315, 172] BackgroundColor "green" Zeros "[]" Poles "-2*pi*[2000]" Gain "[2*pi*2000]" } Block { BlockType Outport Name "Ctrl Out [V]" SID 633 Position [340, 48, 370, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Bias Out [V]" SID 634 Position [340, 138, 370, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "DC Gain3" SrcPort 1 DstBlock "L3_ESD_filter\n[(none):(2000)]" DstPort 1 } Line { SrcBlock "Ctrl In [V]" SrcPort 1 DstBlock "DC Gain3" DstPort 1 } Line { SrcBlock "L3_ESD_filter\n[(none):(2000)]" SrcPort 1 DstBlock "Ctrl Out [V]" DstPort 1 } Line { SrcBlock "Bias In [V]" SrcPort 1 DstBlock "DC Gain1" DstPort 1 } Line { SrcBlock "DC Gain1" SrcPort 1 DstBlock "L3_ESD_filter\n[(none):(2000)]1" DstPort 1 } Line { SrcBlock "L3_ESD_filter\n[(none):(2000)]1" SrcPort 1 DstBlock "Bias Out [V]" DstPort 1 } } } Block { BlockType SubSystem Name "PUM Driver" SID 635 Description "FlexTf: ifoParams.act.drivers.pum.frd" Ports [1, 1] Position [250, 270, 340, 330] BackgroundColor "red" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PUM Driver" Location [12, 45, 932, 1432] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [V]" SID 636 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 637 Position [80, 33, 145, 77] Gain "0.27e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L2_ACQOFF_filter\n[12:110]" SID 766 Position [560, 134, 680, 186] BackgroundColor "green" Zeros "-2*pi*[12]" Poles "-2*pi*[110]" Gain "110/12" } Block { BlockType ZeroPole Name "L2_ACQON_filter\n[1.35:80.5]" SID 767 Position [560, 64, 680, 116] BackgroundColor "green" NamePlacement "alternate" Zeros "-2*pi*[1.35]" Poles "-2*pi*[80.5]" Gain "80.5/1.35" } Block { BlockType ZeroPole Name "L2_LPON_filter\n[(0.5 250):(6 20)]" SID 750 Position [190, 24, 345, 86] BackgroundColor "green" Zeros "-2*pi*[6 20]" Poles "-2*pi*[0.5 250]" Gain "(0.5*250)/(6*20)" } Block { BlockType Switch Name "Switch" SID 641 Position [425, 39, 480, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 642 Position [805, 74, 860, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.pum.state.lp" SID 643 Position [355, 79, 390, 101] Value "ifoParams.act.drivers.pum.state.lp" } Block { BlockType Constant Name "drivers.top.state.acq" SID 644 Position [735, 114, 770, 136] Value "ifoParams.act.drivers.pum.state.acq" } Block { BlockType Outport Name "Out [A]" SID 645 Position [885, 118, 915, 132] IconDisplay "Port number" } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [15, 0] Branch { DstBlock "L2_LPON_filter\n[(0.5 250):(6 20)]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "drivers.pum.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Switch" SrcPort 1 Points [35, 0] Branch { Points [0, 70] DstBlock "L2_ACQOFF_filter\n[12:110]" DstPort 1 } Branch { DstBlock "L2_ACQON_filter\n[1.35:80.5]" DstPort 1 } } Line { SrcBlock "L2_ACQON_filter\n[1.35:80.5]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.top.state.acq" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Line { SrcBlock "L2_LPON_filter\n[(0.5 250):(6 20)]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "L2_ACQOFF_filter\n[12:110]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [119, 217] } } } Block { BlockType Reference Name "PumSelf" SID 5539 Tag "NbNoiseSource" Ports [0, 1] Position [432, 240, 448, 265] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadPumSelf" } Block { BlockType SubSystem Name "QTOP Driver" SID 646 Description "FlexTf: ifoParams.act.drivers.top.frd" Ports [1, 1] Position [250, 55, 340, 115] BackgroundColor "[0.000000, 0.400000, 1.000000]" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QTOP Driver" Location [12, 45, 932, 1432] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [V]" SID 647 Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 648 Position [80, 68, 145, 112] Gain "9.9e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "LP_filter\n[10:1]" SID 649 Position [220, 61, 305, 119] BackgroundColor "green" Zeros "-2*pi*[10]" Poles "-2*pi*[1]" Gain "[1/10]" } Block { BlockType ZeroPole Name "M0_Output_Filter\n[31:0.9]" SID 650 Position [520, 96, 605, 154] BackgroundColor "green" Zeros "-2*pi*[31]" Poles "-2*pi*[0.9]" Gain "[0.9/31]" } Block { BlockType Switch Name "Switch" SID 651 Position [390, 74, 445, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.top.state.lp" SID 652 Position [320, 114, 355, 136] Value "ifoParams.act.drivers.top.state.lp" } Block { BlockType Outport Name "Out [A]" SID 653 Position [660, 118, 690, 132] IconDisplay "Port number" } Line { SrcBlock "Switch" SrcPort 1 DstBlock "M0_Output_Filter\n[31:0.9]" DstPort 1 } Line { SrcBlock "LP_filter\n[10:1]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [25, 0] Branch { DstBlock "LP_filter\n[10:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "M0_Output_Filter\n[31:0.9]" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Line { SrcBlock "drivers.top.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [109, 232] } } } Block { BlockType Sum Name "Sum" SID 5530 Ports [2, 1] Position [430, 75, 450, 95] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 5538 Ports [2, 1] Position [430, 180, 450, 200] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5540 Ports [2, 1] Position [430, 290, 450, 310] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "TopSelf" SID 5529 Tag "NbNoiseSource" Ports [0, 1] Position [432, 25, 448, 50] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadTopSelf" } Block { BlockType SubSystem Name "UIM Driver" SID 654 Description "FlexTf: ifoParams.act.drivers.uim.frd" Ports [1, 1] Position [250, 160, 340, 220] BackgroundColor "green" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UIM Driver" Location [66, 213, 1556, 1126] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [V]" SID 655 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 656 Position [80, 33, 145, 77] Gain "0.15e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L1_LP1_filter\n[10.5:1]" SID 657 Position [195, 27, 300, 83] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_LP2_filter\n[10.5:1]" SID 658 Position [475, 62, 580, 118] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_LP3_filter\n[10.5:1]" SID 659 Position [760, 97, 865, 153] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_Output_filter\n[50:300]" SID 660 Position [1065, 132, 1170, 188] BackgroundColor "green" Zeros "-2*pi*[50]" Poles "-2*pi*[300]" Gain "[300/50]" } Block { BlockType Switch Name "Switch" SID 661 Position [385, 39, 440, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 662 Position [665, 74, 720, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch2" SID 663 Position [955, 109, 1010, 211] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.uim.state.lp1" SID 664 Position [315, 79, 350, 101] Value "ifoParams.act.drivers.uim.state.lp1" } Block { BlockType Constant Name "drivers.uim.state.lp2" SID 665 Position [595, 114, 630, 136] Value "ifoParams.act.drivers.uim.state.lp2" } Block { BlockType Constant Name "drivers.uim.state.lp3" SID 666 Position [885, 149, 920, 171] Value "ifoParams.act.drivers.uim.state.lp3" } Block { BlockType Outport Name "Out [A]" SID 667 Position [1225, 153, 1255, 167] IconDisplay "Port number" } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [20, 0] Branch { DstBlock "L1_LP1_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "drivers.uim.state.lp1" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "L1_LP1_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Switch" SrcPort 1 Points [10, 0] Branch { DstBlock "L1_LP2_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch1" DstPort 3 } } Line { SrcBlock "L1_LP2_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp2" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "Switch1" SrcPort 1 Points [10, 0] Branch { DstBlock "L1_LP3_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch2" DstPort 3 } } Line { SrcBlock "L1_LP3_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch2" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp3" SrcPort 1 DstBlock "Switch2" DstPort 2 } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "Switch2" SrcPort 1 DstBlock "L1_Output_filter\n[50:300]" DstPort 1 } Line { SrcBlock "L1_Output_filter\n[50:300]" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [124, 197] } } } Block { BlockType Reference Name "UimSelf" SID 5537 Tag "NbNoiseSource" Ports [0, 1] Position [432, 130, 448, 155] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadUimSelf" } Block { BlockType Outport Name "TOP Out [A]" SID 668 Position [540, 78, 570, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [A]" SID 669 Position [540, 183, 570, 197] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out [A]" SID 670 Position [540, 293, 570, 307] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out[V]" SID 671 Position [540, 383, 570, 397] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out[V]" SID 672 Position [540, 413, 570, 427] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "TOP In [V]" SrcPort 1 DstBlock "QTOP Driver" DstPort 1 } Line { SrcBlock "PUM In [V]" SrcPort 1 DstBlock "PUM Driver" DstPort 1 } Line { SrcBlock "UIM In [V]" SrcPort 1 DstBlock "UIM Driver" DstPort 1 } Line { SrcBlock "ESD Driver" SrcPort 1 DstBlock "ESD Ctrl Out[V]" DstPort 1 } Line { SrcBlock "ESD Ctrl In [V]" SrcPort 1 DstBlock "ESD Driver" DstPort 1 } Line { SrcBlock "ESD Driver" SrcPort 2 DstBlock "ESD Bias Out[V]" DstPort 1 } Line { SrcBlock "ESD Bias In [V]" SrcPort 1 DstBlock "ESD Driver" DstPort 2 } Line { SrcBlock "TopSelf" SrcPort 1 DstBlock "Sum" DstPort 1 } Line { SrcBlock "QTOP Driver" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "TOP Out [A]" DstPort 1 } Line { SrcBlock "UIM Driver" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "UimSelf" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "UIM Out [A]" DstPort 1 } Line { SrcBlock "PUM Driver" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "PUM Out [A]" DstPort 1 } Line { SrcBlock "PumSelf" SrcPort 1 DstBlock "Sum2" DstPort 1 } Annotation { Name "See T1100378 and LLO aLOG 4495 for reference" Position [142, 22] } } } Block { BlockType SubSystem Name "Driver Force Coefficient" SID 673 Ports [5, 4] Position [1275, 47, 1370, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Driver Force Coefficient" Location [352, 45, 1269, 1517] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "102" Block { BlockType Inport Name "In1[A]" SID 674 Position [40, 58, 70, 72] IconDisplay "Port number" } Block { BlockType Inport Name "In2[A]" SID 675 Position [40, 153, 70, 167] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3[A]" SID 676 Position [40, 243, 70, 257] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vsig[V]" SID 677 Position [40, 333, 70, 347] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Vbias[V]" SID 678 Position [40, 378, 70, 392] Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 679 Position [220, 43, 285, 87] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "1.694" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 680 Position [220, 140, 290, 180] BackgroundColor "green" Gain "1.694" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 681 Position [220, 229, 290, 271] BackgroundColor "red" Gain "0.0309" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain7" SID 682 Position [290, 343, 415, 387] BackgroundColor "cyan" Gain "4.2e-10 / 4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Math Name "Math\nFunction" SID 683 Ports [1, 1] Position [235, 350, 265, 380] Operator "square" } Block { BlockType Sum Name "Subtract" SID 684 Ports [2, 1] Position [185, 319, 210, 406] Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_Out [N]" SID 685 Position [655, 58, 685, 72] IconDisplay "Port number" } Block { BlockType Outport Name "UIM_Out [N]" SID 686 Position [655, 153, 685, 167] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_Out [N]" SID 687 Position [655, 243, 685, 257] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_Out [N]" SID 688 Position [655, 358, 685, 372] Port "4" IconDisplay "Port number" } Line { SrcBlock "In3[A]" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "In2[A]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "In1[A]" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "PUM_Out [N]" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "UIM_Out [N]" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "TOP_Out [N]" DstPort 1 } Line { SrcBlock "Vsig[V]" SrcPort 1 DstBlock "Subtract" DstPort 1 } Line { SrcBlock "Subtract" SrcPort 1 DstBlock "Math\nFunction" DstPort 1 } Line { SrcBlock "Math\nFunction" SrcPort 1 DstBlock "Gain7" DstPort 1 } Line { SrcBlock "Gain7" SrcPort 1 DstBlock "TST_Out [N]" DstPort 1 } Line { SrcBlock "Vbias[V]" SrcPort 1 DstBlock "Subtract" DstPort 2 } Annotation { Name "See T1100378" Position [174, 526] } Annotation { Name "Current to Force [N/A]" Position [263, 215] } Annotation { Name "Current to Force [N/A]" Position [268, 130] } Annotation { Name "Current to Force [N/A]" Position [228, 30] } } } Block { BlockType SubSystem Name "EUL2OSEM" SID 769 Ports [4, 4] Position [440, 46, 580, 284] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "EUL2OSEM" Location [419, 45, 945, 1046] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0_L_IN [ct]" SID 770 Position [55, 63, 85, 77] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1_L_IN [ct]" SID 819 Position [55, 138, 85, 152] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2_L_IN [ct]" SID 820 Position [55, 213, 85, 227] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3_L_IN [ct]" SID 821 Position [55, 288, 85, 302] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 822 Position [190, 279, 225, 311] BackgroundColor "cyan" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 823 Position [190, 54, 225, 86] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "1/2" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 824 Position [190, 129, 225, 161] BackgroundColor "green" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain5" SID 825 Position [190, 204, 225, 236] BackgroundColor "red" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "M0_OSEM_OUT [ct]" SID 813 Position [320, 63, 350, 77] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "L1_OSEM_OUT [ct]" SID 814 Position [320, 138, 350, 152] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "L2_OSEM_OUT [ct]" SID 815 Position [320, 213, 350, 227] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "L3_OSEM_OUT [ct]" SID 816 Position [320, 288, 350, 302] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "M0_L_IN [ct]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "L1_L_IN [ct]" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "L2_L_IN [ct]" SrcPort 1 DstBlock "Gain5" DstPort 1 } Line { SrcBlock "L3_L_IN [ct]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "M0_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "L1_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain5" SrcPort 1 DstBlock "L2_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "L3_OSEM_OUT [ct]" DstPort 1 } Annotation { Name "4 coil-magnet\nactuators" Position [208, 190] } Annotation { Name "4 coil-magnet\nactuators" Position [208, 115] } Annotation { Name "2 coil-magnet\nactuators" Position [208, 40] } Annotation { Name "4 ESD Quadrants" Position [208, 270] } } } Block { BlockType SubSystem Name "L1 LOCK" SID 4080 Ports [1, 1] Position [280, 117, 400, 153] BackgroundColor "green" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L1 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 4081 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 4082 Description "FlexTf: ifoParams.act.L1.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 4083 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 4084 Description "FlexTf: ifoParams.act.L1.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 4085 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 4086 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 4087 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 4088 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 4089 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 4090 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 4091 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 4092 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L1.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L1_OUT [ct]" SID 4093 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L1_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "L2 LOCK" SID 4108 Ports [1, 1] Position [280, 177, 400, 213] BackgroundColor "red" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L2 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 4109 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 4110 Description "FlexTf: ifoParams.act.L2.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 4111 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 4112 Description "FlexTf: ifoParams.act.L2.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 4113 Description "FlexTf: ifoParams.act.L2.lock(3).frd" Ports [1, 1] Position [345, 25, 425, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 4114 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 4115 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 4116 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 4117 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 4118 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 4119 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 4120 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L2.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L2_OUT [ct]" SID 4121 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L2_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "L3 LOCK" SID 4094 Ports [1, 1] Position [280, 237, 400, 273] BackgroundColor "cyan" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L3 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 4095 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 4096 Description "FlexTf: ifoParams.act.L3.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 4097 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 4098 Description "FlexTf: ifoParams.act.L3.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 4099 Description "FlexTf: ifoParams.act.L3.lock(3).frd" Ports [1, 1] Position [345, 25, 425, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 4100 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 4101 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 4102 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 4103 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 4104 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 4105 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 4106 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L3.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L3_OUT [ct]" SID 4107 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L3_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "LSC_ETMX" SID 4595 Ports [1, 1] Position [90, 235, 225, 275] BackgroundColor "cyan" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "LSC_ETMX" Location [335, 45, 1505, 927] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_ETMX_IN" SID 4596 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 4597 Ports [1, 1] Position [145, 25, 225, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 4598 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 4599 Ports [1, 1] Position [245, 25, 325, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 4600 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 4601 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 4602 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 4603 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 4604 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 4605 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 4606 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 4607 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.lsc.etmxGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "LSC_ETMX_OUT " SID 4608 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_ETMX_IN" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "LSC_ETMX_OUT " DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "M0 LOCK" SID 4056 Ports [1, 1] Position [280, 57, 400, 93] BackgroundColor "[0.000000, 0.400000, 1.000000]" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "M0 LOCK" Location [12, 45, 1028, 1455] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 4057 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 4070 Ports [1, 1] Position [145, 25, 225, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 4079 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 4071 Ports [1, 1] Position [245, 25, 325, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 4072 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 4073 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 4063 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 4075 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 4076 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 4077 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 4078 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 4068 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.M0.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "M0_OUT [ct]" SID 4069 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "M0_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType Constant Name "esdBias_ct" SID 827 Position [320, 308, 355, 322] BackgroundColor "cyan" Value "ifoParams.act.esdBias_ct" } Block { BlockType Outport Name "TOP_L_DRIVE_OUT [N]" SID 832 Position [1600, 78, 1630, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_DRIVE_OUT [N]" SID 835 Position [1600, 153, 1630, 167] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_DRIVE_OUT [N]" SID 836 Position [1600, 228, 1630, 242] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_DRIVE_OUT [N]" SID 837 Position [1600, 303, 1630, 317] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "Driver Force Coefficient" SrcPort 1 DstBlock "Actuator-to-Euler Transform" DstPort 1 } Line { SrcBlock "Driver Force Coefficient" SrcPort 2 DstBlock "Actuator-to-Euler Transform" DstPort 2 } Line { SrcBlock "Driver Force Coefficient" SrcPort 3 DstBlock "Actuator-to-Euler Transform" DstPort 3 } Line { SrcBlock "Driver Force Coefficient" SrcPort 4 DstBlock "Actuator-to-Euler Transform" DstPort 4 } Line { SrcBlock "DAC" SrcPort 1 DstBlock "Anti-Aliasing Chassis" DstPort 1 } Line { SrcBlock "DAC" SrcPort 2 DstBlock "Anti-Aliasing Chassis" DstPort 2 } Line { SrcBlock "DAC" SrcPort 3 DstBlock "Anti-Aliasing Chassis" DstPort 3 } Line { SrcBlock "DAC" SrcPort 4 DstBlock "Anti-Aliasing Chassis" DstPort 4 } Line { SrcBlock "DAC" SrcPort 5 DstBlock "Anti-Aliasing Chassis" DstPort 5 } Line { SrcBlock "COILOUTF" SrcPort 1 DstBlock "DAC" DstPort 1 } Line { SrcBlock "COILOUTF" SrcPort 2 DstBlock "DAC" DstPort 2 } Line { SrcBlock "COILOUTF" SrcPort 3 DstBlock "DAC" DstPort 3 } Line { SrcBlock "COILOUTF" SrcPort 4 DstBlock "DAC" DstPort 4 } Line { SrcBlock "COILOUTF" SrcPort 5 DstBlock "DAC" DstPort 5 } Line { SrcBlock "M0 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 1 } Line { SrcBlock "EUL2OSEM" SrcPort 1 DstBlock "COILOUTF" DstPort 1 } Line { SrcBlock "EUL2OSEM" SrcPort 2 DstBlock "COILOUTF" DstPort 2 } Line { SrcBlock "EUL2OSEM" SrcPort 3 DstBlock "COILOUTF" DstPort 3 } Line { SrcBlock "EUL2OSEM" SrcPort 4 DstBlock "COILOUTF" DstPort 4 } Line { SrcBlock "esdBias_ct" SrcPort 1 DstBlock "COILOUTF" DstPort 5 } Line { SrcBlock "LSC_ETMX_IN [m]" SrcPort 1 DstBlock "LSC_ETMX" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 1 DstBlock "TOP_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 2 DstBlock "UIM_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 3 DstBlock "PUM_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 4 DstBlock "TST_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 1 DstBlock "Driver Electronics" DstPort 1 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 2 DstBlock "Driver Electronics" DstPort 2 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 3 DstBlock "Driver Electronics" DstPort 3 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 4 DstBlock "Driver Electronics" DstPort 4 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 5 DstBlock "Driver Electronics" DstPort 5 } Line { SrcBlock "Driver Electronics" SrcPort 1 DstBlock "Driver Force Coefficient" DstPort 1 } Line { SrcBlock "Driver Electronics" SrcPort 2 DstBlock "Driver Force Coefficient" DstPort 2 } Line { SrcBlock "Driver Electronics" SrcPort 3 DstBlock "Driver Force Coefficient" DstPort 3 } Line { SrcBlock "Driver Electronics" SrcPort 4 DstBlock "Driver Force Coefficient" DstPort 4 } Line { SrcBlock "Driver Electronics" SrcPort 5 DstBlock "Driver Force Coefficient" DstPort 5 } Line { SrcBlock "L1 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 2 } Line { SrcBlock "L2 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 3 } Line { SrcBlock "L3 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 4 } Line { SrcBlock "LSC_ETMX" SrcPort 1 Points [20, 0] Branch { Points [0, -60] Branch { Points [0, -60] Branch { Points [0, -60] DstBlock "M0 LOCK" DstPort 1 } Branch { DstBlock "L1 LOCK" DstPort 1 } } Branch { DstBlock "L2 LOCK" DstPort 1 } } Branch { DstBlock "L3 LOCK" DstPort 1 } } } } Block { BlockType SubSystem Name "QUAD" SID 202 Ports [30, 24] Position [760, 64, 950, 821] BackgroundColor "[0.686275, 0.866667, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QUAD" Location [12, 45, 1060, 1153] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "GND_L_DISP_IN [m]" SID 203 Position [45, 28, 75, 42] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "GND_T_DISP_IN [m]" SID 204 Position [45, 58, 75, 72] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "GND_V_DISP_IN [m]" SID 205 Position [45, 88, 75, 102] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "GND_R_DISP_IN [rad]" SID 207 Position [45, 118, 75, 132] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "GND_P_DISP_IN [rad]" SID 209 Position [45, 148, 75, 162] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "GND_Y_DISP_IN [rad]" SID 211 Position [45, 178, 75, 192] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_L_DRIVE_IN [N]" SID 213 Position [45, 208, 75, 222] BackgroundColor "yellow" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_T_DRIVE_IN [N]" SID 215 Position [45, 238, 75, 252] BackgroundColor "yellow" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_V_DRIVE_IN [N]" SID 217 Position [45, 268, 75, 282] BackgroundColor "yellow" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_R_DRIVE_IN [N.m]" SID 219 Position [45, 298, 75, 312] BackgroundColor "yellow" Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_P_DRIVE_IN [N.m]" SID 221 Position [45, 328, 75, 342] BackgroundColor "yellow" Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_Y_DRIVE_IN [N.m]" SID 223 Position [45, 358, 75, 372] BackgroundColor "yellow" Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_L_DRIVE_IN [N]" SID 225 Position [45, 388, 75, 402] BackgroundColor "yellow" Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_T_DRIVE_IN [N]" SID 227 Position [45, 418, 75, 432] BackgroundColor "yellow" Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_V_DRIVE_IN [N]" SID 229 Position [45, 448, 75, 462] BackgroundColor "yellow" Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_R_DRIVE_IN [N.m]" SID 231 Position [45, 478, 75, 492] BackgroundColor "yellow" Port "16" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_P_DRIVE_IN [N.m]" SID 233 Position [45, 508, 75, 522] BackgroundColor "yellow" Port "17" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_Y_DRIVE_IN [N.m]" SID 235 Position [45, 538, 75, 552] BackgroundColor "yellow" Port "18" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_L_DRIVE_IN [N]" SID 237 Position [45, 568, 75, 582] BackgroundColor "yellow" Port "19" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_T_DRIVE_IN [N]" SID 239 Position [45, 598, 75, 612] BackgroundColor "yellow" Port "20" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_V_DRIVE_IN [N]" SID 241 Position [45, 628, 75, 642] BackgroundColor "yellow" Port "21" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_R_DRIVE_IN [N.m]" SID 243 Position [45, 658, 75, 672] BackgroundColor "yellow" Port "22" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_P_DRIVE_IN [N.m]" SID 245 Position [45, 688, 75, 702] BackgroundColor "yellow" Port "23" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_Y_DRIVE_IN [N.m]" SID 247 Position [45, 718, 75, 732] BackgroundColor "yellow" Port "24" IconDisplay "Port number" } Block { BlockType Inport Name "TST_L_DRIVE_IN [N]" SID 249 Position [45, 748, 75, 762] BackgroundColor "yellow" Port "25" IconDisplay "Port number" } Block { BlockType Inport Name "TST_T_DRIVE_IN [N]" SID 251 Position [45, 778, 75, 792] BackgroundColor "yellow" Port "26" IconDisplay "Port number" } Block { BlockType Inport Name "TST_V_DRIVE_IN [N]" SID 253 Position [45, 808, 75, 822] BackgroundColor "yellow" Port "27" IconDisplay "Port number" } Block { BlockType Inport Name "TST_R_DRIVE_IN [N.m]" SID 254 Position [45, 838, 75, 852] BackgroundColor "yellow" Port "28" IconDisplay "Port number" } Block { BlockType Inport Name "TST_P_DRIVE_IN [N.m]" SID 255 Position [45, 868, 75, 882] BackgroundColor "yellow" Port "29" IconDisplay "Port number" } Block { BlockType Inport Name "TST_Y_DRIVE_IN [N.m]" SID 256 Position [45, 898, 75, 912] BackgroundColor "yellow" Port "30" IconDisplay "Port number" } Block { BlockType Demux Name "Demux" SID 200 Ports [1, 24] Position [590, 114, 595, 826] BackgroundColor "black" ShowName off Outputs "24" } Block { BlockType From Name "From" SID 448 Position [725, 266, 815, 284] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DISP" } Block { BlockType From Name "From1" SID 451 Position [725, 206, 815, 224] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DISP" } Block { BlockType From Name "From10" SID 476 Position [260, 296, 350, 314] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DRIVE" } Block { BlockType From Name "From11" SID 477 Position [260, 356, 350, 374] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DRIVE" } Block { BlockType From Name "From12" SID 480 Position [260, 476, 350, 494] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DRIVE" } Block { BlockType From Name "From13" SID 481 Position [260, 536, 350, 554] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DRIVE" } Block { BlockType From Name "From14" SID 484 Position [260, 656, 350, 674] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DRIVE" } Block { BlockType From Name "From15" SID 485 Position [260, 716, 350, 734] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DRIVE" } Block { BlockType From Name "From16" SID 488 Position [260, 836, 350, 854] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DRIVE" } Block { BlockType From Name "From17" SID 489 Position [260, 896, 350, 914] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DRIVE" } Block { BlockType From Name "From2" SID 452 Position [725, 446, 815, 464] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DISP" } Block { BlockType From Name "From3" SID 453 Position [725, 386, 815, 404] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DISP" } Block { BlockType From Name "From4" SID 456 Position [725, 626, 815, 644] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DISP" } Block { BlockType From Name "From5" SID 457 Position [725, 566, 815, 584] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DISP" } Block { BlockType From Name "From6" SID 460 Position [725, 806, 815, 824] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DISP" } Block { BlockType From Name "From7" SID 461 Position [725, 746, 815, 764] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DISP" } Block { BlockType From Name "From8" SID 464 Position [260, 116, 350, 134] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "GND_Y_DISP" } Block { BlockType From Name "From9" SID 465 Position [260, 176, 350, 194] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "GND_R_DISP" } Block { BlockType Goto Name "Goto" SID 449 Position [615, 206, 710, 224] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto1" SID 450 Position [615, 266, 710, 284] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto10" SID 478 Position [150, 356, 245, 374] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto11" SID 479 Position [150, 296, 245, 314] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto12" SID 482 Position [150, 536, 245, 554] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto13" SID 483 Position [150, 476, 245, 494] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto14" SID 486 Position [150, 716, 245, 734] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto15" SID 487 Position [150, 656, 245, 674] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto16" SID 490 Position [150, 896, 245, 914] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto17" SID 491 Position [150, 836, 245, 854] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto2" SID 454 Position [615, 386, 710, 404] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto3" SID 455 Position [615, 446, 710, 464] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto4" SID 458 Position [615, 566, 710, 584] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto5" SID 459 Position [615, 626, 710, 644] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto6" SID 462 Position [615, 746, 710, 764] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto7" SID 463 Position [615, 806, 710, 824] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto8" SID 466 Position [150, 176, 245, 194] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "GND_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto9" SID 467 Position [150, 116, 245, 134] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "GND_R_DISP" TagVisibility "local" } Block { BlockType Mux Name "Mux1" SID 195 Ports [30, 1] Position [385, 16, 390, 924] BackgroundColor "black" ShowName off Inputs "30" } Block { BlockType Reference Name "QUAD" SID 57 Description "FlexTf: ifoParams.act.quadModel.frd" Ports [1, 1] Position [420, 452, 555, 488] BackgroundColor "[0.505504, 0.250861, 1.000000]" AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.quadModel.ss" IC "[]" } Block { BlockType Outport Name "TOP_L_Disp [m]" SID 206 Position [835, 118, 865, 132] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_T_Disp [m]" SID 208 Position [835, 148, 865, 162] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_V_Disp [m]" SID 210 Position [835, 178, 865, 192] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_R_Disp [rad]" SID 212 Position [835, 208, 865, 222] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_P_Disp [rad]" SID 214 Position [835, 238, 865, 252] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_Y_Disp [rad]" SID 216 Position [835, 268, 865, 282] BackgroundColor "orange" Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_Disp [m]" SID 218 Position [835, 298, 865, 312] BackgroundColor "orange" Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_T_Disp [m]" SID 220 Position [835, 328, 865, 342] BackgroundColor "orange" Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_V_Disp [m]" SID 222 Position [835, 358, 865, 372] BackgroundColor "orange" Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_R_Disp [rad]" SID 224 Position [835, 388, 865, 402] BackgroundColor "orange" Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_P_Disp [rad]" SID 226 Position [835, 418, 865, 432] BackgroundColor "orange" Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_Y_Disp [rad]" SID 228 Position [835, 448, 865, 462] BackgroundColor "orange" Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_Disp [m]" SID 230 Position [835, 478, 865, 492] BackgroundColor "orange" Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_T_Disp [m]" SID 232 Position [835, 508, 865, 522] BackgroundColor "orange" Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_V_Disp [m]" SID 234 Position [835, 538, 865, 552] BackgroundColor "orange" Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_R_Disp [rad]" SID 236 Position [835, 568, 865, 582] BackgroundColor "orange" Port "16" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_P_Disp [rad]" SID 238 Position [835, 598, 865, 612] BackgroundColor "orange" Port "17" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_Y_Disp [rad]" SID 240 Position [835, 628, 865, 642] BackgroundColor "orange" Port "18" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_Disp [m]" SID 242 Position [835, 658, 865, 672] BackgroundColor "orange" Port "19" IconDisplay "Port number" } Block { BlockType Outport Name "TST_T_Disp [m]" SID 244 Position [835, 688, 865, 702] BackgroundColor "orange" Port "20" IconDisplay "Port number" } Block { BlockType Outport Name "TST_V_Disp [m]" SID 246 Position [835, 718, 865, 732] BackgroundColor "orange" Port "21" IconDisplay "Port number" } Block { BlockType Outport Name "TST_R_Disp [rad]" SID 248 Position [835, 748, 865, 762] BackgroundColor "orange" Port "22" IconDisplay "Port number" } Block { BlockType Outport Name "TST_P_Disp [rad]" SID 250 Position [835, 778, 865, 792] BackgroundColor "orange" Port "23" IconDisplay "Port number" } Block { BlockType Outport Name "TST_Y_Disp [rad]" SID 252 Position [835, 808, 865, 822] BackgroundColor "orange" Port "24" IconDisplay "Port number" } Line { SrcBlock "QUAD" SrcPort 1 DstBlock "Demux" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "QUAD" DstPort 1 } Line { SrcBlock "GND_L_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "GND_T_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "GND_V_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Demux" SrcPort 1 DstBlock "TOP_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 2 DstBlock "TOP_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 3 DstBlock "TOP_V_Disp [m]" DstPort 1 } Line { SrcBlock "TOP_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 7 } Line { SrcBlock "TOP_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 8 } Line { SrcBlock "TOP_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 9 } Line { SrcBlock "Demux" SrcPort 7 DstBlock "UIM_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 8 DstBlock "UIM_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 9 DstBlock "UIM_V_Disp [m]" DstPort 1 } Line { SrcBlock "UIM_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 14 } Line { SrcBlock "UIM_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 15 } Line { SrcBlock "Demux" SrcPort 13 DstBlock "PUM_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 14 DstBlock "PUM_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 15 DstBlock "PUM_V_Disp [m]" DstPort 1 } Line { SrcBlock "PUM_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 19 } Line { SrcBlock "PUM_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 20 } Line { SrcBlock "PUM_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 21 } Line { SrcBlock "Demux" SrcPort 19 DstBlock "TST_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 20 DstBlock "TST_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 21 DstBlock "TST_V_Disp [m]" DstPort 1 } Line { SrcBlock "TST_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 25 } Line { SrcBlock "TST_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 26 } Line { SrcBlock "TST_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 27 } Line { SrcBlock "Demux" SrcPort 4 DstBlock "Goto" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "TOP_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 6 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "TOP_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 5 DstBlock "TOP_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 10 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Demux" SrcPort 11 DstBlock "UIM_P_Disp [rad]" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "UIM_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 12 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "UIM_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 16 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "PUM_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 17 DstBlock "PUM_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 18 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "PUM_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "TST_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 22 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Demux" SrcPort 23 DstBlock "TST_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 24 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "TST_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "UIM_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 13 } Line { SrcBlock "GND_R_DISP_IN [rad]" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "GND_P_DISP_IN [rad]" SrcPort 1 DstBlock "Mux1" DstPort 5 } Line { SrcBlock "GND_Y_DISP_IN [rad]" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mux1" DstPort 6 } Line { SrcBlock "TOP_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "TOP_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 11 } Line { SrcBlock "TOP_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mux1" DstPort 10 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Mux1" DstPort 12 } Line { SrcBlock "UIM_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "UIM_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "PUM_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "PUM_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "TST_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "TST_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Mux1" DstPort 16 } Line { SrcBlock "UIM_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 17 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Mux1" DstPort 18 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Mux1" DstPort 22 } Line { SrcBlock "PUM_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 23 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Mux1" DstPort 24 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mux1" DstPort 28 } Line { SrcBlock "TST_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 29 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Mux1" DstPort 30 } Annotation { Name "Mark Barton's Models have their DOFs in \nL T V Y P R order, where as Jeff Kissel's control \nsystems ha" "ve their DOFs in L T V R P Y order.\nHence the R and Y switcheroo seen in here." Position [524, 56] BackgroundColor "yellow" } } } Block { BlockType Reference Name "SqueezedFilmDamping" SID 5618 Tag "NbNoiseSource" Ports [0, 1] Position [482, 840, 498, 865] BlockRotation 270 BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Squeezed Film Damping'" asd "ifoParams.darmNb.squeezedFilmDamping" } Block { BlockType Sum Name "Sum1" SID 5619 Ports [2, 1] Position [480, 785, 500, 805] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 839 Ports [2, 1] Position [470, 220, 490, 240] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Terminator Name "Terminator" SID 435 Position [1055, 274, 1075, 286] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator1" SID 436 Position [1055, 304, 1075, 316] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator10" SID 445 Position [1055, 574, 1075, 586] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator11" SID 446 Position [1055, 604, 1075, 616] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator2" SID 437 Position [1055, 334, 1075, 346] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator3" SID 438 Position [1055, 364, 1075, 376] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator4" SID 439 Position [1055, 394, 1075, 406] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator5" SID 440 Position [1055, 424, 1075, 436] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator6" SID 441 Position [1055, 454, 1075, 466] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator7" SID 442 Position [1055, 484, 1075, 496] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator8" SID 443 Position [1055, 514, 1075, 526] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator9" SID 444 Position [1055, 544, 1075, 556] BackgroundColor "red" ShowName off } Block { BlockType Outport Name "ETM_Displacement [m]" SID 856 Position [1265, 708, 1295, 722] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "QUAD" SrcPort 1 Points [85, 0; 0, -45; -820, 0; 0, 175] DstBlock "Damping Loops" DstPort 1 } Line { Labels [4, 0] SrcBlock "QUAD" SrcPort 2 Points [90, 0; 0, -80; -830, 0; 0, 205] DstBlock "Damping Loops" DstPort 2 } Line { SrcBlock "QUAD" SrcPort 3 Points [95, 0; 0, -115; -840, 0; 0, 235] DstBlock "Damping Loops" DstPort 3 } Line { SrcBlock "QUAD" SrcPort 4 Points [100, 0; 0, -150; -850, 0; 0, 265] DstBlock "Damping Loops" DstPort 4 } Line { SrcBlock "QUAD" SrcPort 5 Points [105, 0; 0, -185; -860, 0; 0, 295] DstBlock "Damping Loops" DstPort 5 } Line { SrcBlock "QUAD" SrcPort 6 Points [110, 0; 0, -220; -870, 0; 0, 325] DstBlock "Damping Loops" DstPort 6 } Line { SrcBlock "QUAD" SrcPort 7 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 8 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 9 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 10 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 11 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 12 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 13 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 14 DstBlock "Terminator7" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 15 DstBlock "Terminator8" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 16 DstBlock "Terminator9" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 17 DstBlock "Terminator10" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 18 DstBlock "Terminator11" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 19 DstBlock "Cavity Misalignments" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 20 DstBlock "Cavity Misalignments" DstPort 2 } Line { SrcBlock "QUAD" SrcPort 21 DstBlock "Cavity Misalignments" DstPort 3 } Line { SrcBlock "QUAD" SrcPort 22 DstBlock "Cavity Misalignments" DstPort 4 } Line { SrcBlock "QUAD" SrcPort 23 DstBlock "Cavity Misalignments" DstPort 5 } Line { SrcBlock "QUAD" SrcPort 24 DstBlock "Cavity Misalignments" DstPort 6 } Line { SrcBlock "Ground" SrcPort 1 DstBlock "QUAD" DstPort 14 } Line { SrcBlock "Ground1" SrcPort 1 DstBlock "QUAD" DstPort 15 } Line { SrcBlock "Ground4" SrcPort 1 DstBlock "QUAD" DstPort 18 } Line { SrcBlock "Ground3" SrcPort 1 DstBlock "QUAD" DstPort 17 } Line { SrcBlock "Ground2" SrcPort 1 DstBlock "QUAD" DstPort 16 } Line { SrcBlock "Ground5" SrcPort 1 DstBlock "QUAD" DstPort 20 } Line { SrcBlock "Ground6" SrcPort 1 DstBlock "QUAD" DstPort 21 } Line { SrcBlock "Ground7" SrcPort 1 DstBlock "QUAD" DstPort 22 } Line { SrcBlock "Ground8" SrcPort 1 DstBlock "QUAD" DstPort 23 } Line { SrcBlock "Ground9" SrcPort 1 DstBlock "QUAD" DstPort 24 } Line { SrcBlock "Ground10" SrcPort 1 DstBlock "QUAD" DstPort 26 } Line { SrcBlock "Ground11" SrcPort 1 DstBlock "QUAD" DstPort 27 } Line { SrcBlock "Ground12" SrcPort 1 DstBlock "QUAD" DstPort 28 } Line { SrcBlock "Ground13" SrcPort 1 DstBlock "QUAD" DstPort 29 } Line { SrcBlock "Ground14" SrcPort 1 DstBlock "QUAD" DstPort 30 } Line { SrcBlock "Cavity Misalignments" SrcPort 1 DstBlock "ETM_Displacement [m]" DstPort 1 } Line { SrcBlock "Hierarchy Loops" SrcPort 3 Points [66, 0; 0, -215] DstBlock "QUAD" DstPort 19 } Line { SrcBlock "Hierarchy Loops" SrcPort 2 Points [48, 0; 0, -315] DstBlock "QUAD" DstPort 13 } Line { SrcBlock "Damping Loops" SrcPort 2 DstBlock "QUAD" DstPort 8 } Line { SrcBlock "Damping Loops" SrcPort 3 DstBlock "QUAD" DstPort 9 } Line { SrcBlock "Damping Loops" SrcPort 4 DstBlock "QUAD" DstPort 10 } Line { SrcBlock "Damping Loops" SrcPort 5 DstBlock "QUAD" DstPort 11 } Line { SrcBlock "Damping Loops" SrcPort 6 DstBlock "QUAD" DstPort 12 } Line { SrcBlock "Damping Loops" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Hierarchy Loops" SrcPort 1 Points [30, 0] DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "QUAD" DstPort 7 } Line { SrcBlock "ETMX_CTRL_IN [m]" SrcPort 1 DstBlock "Hierarchy Loops" DstPort 1 } Line { SrcBlock "Ground20" SrcPort 1 DstBlock "QUAD" DstPort 1 } Line { SrcBlock "Ground15" SrcPort 1 DstBlock "QUAD" DstPort 2 } Line { SrcBlock "Ground16" SrcPort 1 DstBlock "QUAD" DstPort 3 } Line { SrcBlock "Ground17" SrcPort 1 DstBlock "QUAD" DstPort 4 } Line { SrcBlock "Ground18" SrcPort 1 DstBlock "QUAD" DstPort 5 } Line { SrcBlock "Ground19" SrcPort 1 DstBlock "QUAD" DstPort 6 } Line { SrcBlock "Sum1" SrcPort 1 Points [27, 0; 0, -115] DstBlock "QUAD" DstPort 25 } Line { SrcBlock "Hierarchy Loops" SrcPort 4 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "SqueezedFilmDamping" SrcPort 1 DstBlock "Sum1" DstPort 2 } } } Block { BlockType SubSystem Name "ETMY" SID 4609 Ports [1, 1] Position [305, 79, 505, 121] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ETMY" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "ETMY_CTRL_IN [m]" SID 4610 Position [45, 713, 75, 727] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "Cavity Misalignments" SID 4611 Ports [6, 1] Position [990, 629, 1145, 801] BackgroundColor "[0.900000, 0.600300, 0.600300]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Cavity Misalignments" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TST_L_Disp [m]" SID 4612 Position [45, 38, 75, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "TST_T_Disp [m]" SID 4613 Position [45, 98, 75, 112] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "TST_V_Disp [m]" SID 4614 Position [45, 168, 75, 182] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TST_R_Disp [rad]" SID 4615 Position [45, 238, 75, 252] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "TST_P_Disp [rad]" SID 4616 Position [45, 308, 75, 322] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "TST_Y_Disp [rad]" SID 4617 Position [45, 378, 75, 392] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Product Name "BeamMisalignment\nP2L [m/rad]" SID 4618 Ports [2, 1] Position [250, 307, 280, 338] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "BeamMisalignment\nY2L [m/rad]" SID 4619 Ports [2, 1] Position [250, 377, 280, 408] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "EarthCurvature\nV2L [m/m]" SID 4620 Ports [2, 1] Position [250, 167, 280, 198] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "P2L" SID 4624 Position [115, 323, 150, 337] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.P2L" } Block { BlockType Constant Name "R2L" SID 4625 Position [115, 253, 150, 267] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.R2L" } Block { BlockType Product Name "R2L [m/rad]" SID 4621 Ports [2, 1] Position [250, 237, 280, 268] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 4622 Ports [6, 1] Position [400, 14, 420, 426] ShowName off Inputs "++++++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "T2L" SID 4626 Position [115, 113, 150, 127] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.T2L" } Block { BlockType Product Name "T2L [m/m]" SID 4623 Ports [2, 1] Position [250, 97, 280, 128] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Constant Name "V2L" SID 4627 Position [115, 183, 150, 197] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.V2L" } Block { BlockType Constant Name "Y2L" SID 4628 Position [115, 393, 150, 407] BackgroundColor "[0.900000, 0.600300, 0.600300]" Value "ifoParams.act.cavityCrossCouplings.P2L" } Block { BlockType Outport Name "TestMass_L_Displacement [m]" SID 4629 Position [485, 213, 515, 227] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "V2L" SrcPort 1 DstBlock "EarthCurvature\nV2L [m/m]" DstPort 2 } Line { SrcBlock "P2L" SrcPort 1 DstBlock "BeamMisalignment\nP2L [m/rad]" DstPort 2 } Line { SrcBlock "Y2L" SrcPort 1 DstBlock "BeamMisalignment\nY2L [m/rad]" DstPort 2 } Line { SrcBlock "TST_V_Disp [m]" SrcPort 1 DstBlock "EarthCurvature\nV2L [m/m]" DstPort 1 } Line { SrcBlock "TST_P_Disp [rad]" SrcPort 1 DstBlock "BeamMisalignment\nP2L [m/rad]" DstPort 1 } Line { SrcBlock "TST_Y_Disp [rad]" SrcPort 1 DstBlock "BeamMisalignment\nY2L [m/rad]" DstPort 1 } Line { SrcBlock "R2L" SrcPort 1 DstBlock "R2L [m/rad]" DstPort 2 } Line { SrcBlock "T2L" SrcPort 1 DstBlock "T2L [m/m]" DstPort 2 } Line { SrcBlock "TST_R_Disp [rad]" SrcPort 1 DstBlock "R2L [m/rad]" DstPort 1 } Line { SrcBlock "TST_T_Disp [m]" SrcPort 1 DstBlock "T2L [m/m]" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "TestMass_L_Displacement [m]" DstPort 1 } Line { SrcBlock "TST_L_Disp [m]" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "T2L [m/m]" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "EarthCurvature\nV2L [m/m]" SrcPort 1 DstBlock "Sum1" DstPort 3 } Line { SrcBlock "R2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 4 } Line { SrcBlock "BeamMisalignment\nP2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 5 } Line { SrcBlock "BeamMisalignment\nY2L [m/rad]" SrcPort 1 DstBlock "Sum1" DstPort 6 } } } Block { BlockType SubSystem Name "Damping Loops" SID 5441 Ports [6, 6] Position [245, 210, 450, 375] BackgroundColor "lightBlue" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Damping Loops" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP_L_DISP_IN [m]" SID 5442 Position [65, 98, 95, 112] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_T_DISP_IN [m]" SID 5443 Position [65, 158, 95, 172] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_V_DISP_IN [m]" SID 5444 Position [65, 218, 95, 232] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_R_DISP_IN [rad]" SID 5445 Position [65, 278, 95, 292] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_P_DISP_IN [rad]" SID 5446 Position [65, 338, 95, 352] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_Y_DISP_IN [rad]" SID 5447 Position [65, 398, 95, 412] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Reference Name "BosemL" SID 5701 Tag "NbNoiseSource" Ports [0, 1] Position [137, 40, 153, 65] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'BOSEM L'" asd "ifoParams.darmNb.bosem" } Block { BlockType Reference Name "DAMP L" SID 5448 Ports [1, 1] Position [190, 85, 415, 125] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(1).ss" IC "[]" } Block { BlockType Reference Name "DAMP P" SID 5449 Ports [1, 1] Position [190, 326, 415, 364] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(5).ss" IC "[]" } Block { BlockType Reference Name "DAMP R" SID 5450 Ports [1, 1] Position [190, 266, 415, 304] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(4).ss" IC "[]" } Block { BlockType Reference Name "DAMP T" SID 5451 Ports [1, 1] Position [190, 146, 415, 184] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(2).ss" IC "[]" } Block { BlockType Reference Name "DAMP V" SID 5452 Ports [1, 1] Position [190, 206, 415, 244] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(3).ss" IC "[]" } Block { BlockType Reference Name "DAMP Y" SID 5453 Ports [1, 1] Position [190, 386, 415, 424] BackgroundColor "[0.000000, 0.400000, 1.000000]" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.damp(6).ss" IC "[]" } Block { BlockType Sum Name "Sum2" SID 5702 Ports [2, 1] Position [135, 95, 155, 115] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_L_DRIVE_OUT [N]" SID 5454 Position [470, 98, 500, 112] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_T_DRIVE_OUT [N]" SID 5455 Position [470, 158, 500, 172] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_V_DRIVE_OUT [N]" SID 5456 Position [470, 218, 500, 232] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_R_DRIVE_OUT [N.m]" SID 5457 Position [470, 278, 500, 292] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_P_DRIVE_OUT [N.m]" SID 5458 Position [470, 338, 500, 352] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_Y_DRIVE_OUT [N.m]" SID 5459 Position [470, 398, 500, 412] BackgroundColor "orange" Port "6" IconDisplay "Port number" } Line { SrcBlock "DAMP L" SrcPort 1 DstBlock "TOP_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP T" SrcPort 1 DstBlock "TOP_T_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP V" SrcPort 1 DstBlock "TOP_V_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "DAMP R" SrcPort 1 DstBlock "TOP_R_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "DAMP P" SrcPort 1 DstBlock "TOP_P_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "DAMP Y" SrcPort 1 DstBlock "TOP_Y_DRIVE_OUT [N.m]" DstPort 1 } Line { SrcBlock "TOP_T_DISP_IN [m]" SrcPort 1 DstBlock "DAMP T" DstPort 1 } Line { SrcBlock "TOP_V_DISP_IN [m]" SrcPort 1 DstBlock "DAMP V" DstPort 1 } Line { SrcBlock "TOP_R_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP R" DstPort 1 } Line { SrcBlock "TOP_P_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP P" DstPort 1 } Line { SrcBlock "TOP_Y_DISP_IN [rad]" SrcPort 1 DstBlock "DAMP Y" DstPort 1 } Line { SrcBlock "BosemL" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "TOP_L_DISP_IN [m]" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "DAMP L" DstPort 1 } } } Block { BlockType Ground Name "Ground" SID 4649 Position [705, 399, 725, 411] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground1" SID 4650 Position [705, 424, 725, 436] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground10" SID 4651 Position [705, 699, 725, 711] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground11" SID 4652 Position [705, 724, 725, 736] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground12" SID 4653 Position [705, 749, 725, 761] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground13" SID 4654 Position [705, 774, 725, 786] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground14" SID 4655 Position [705, 799, 725, 811] BackgroundColor "cyan" ShowName off } Block { BlockType Ground Name "Ground15" SID 4656 Position [705, 99, 725, 111] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground16" SID 4657 Position [705, 124, 725, 136] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground17" SID 4658 Position [705, 149, 725, 161] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground18" SID 4659 Position [705, 174, 725, 186] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground19" SID 4660 Position [705, 199, 725, 211] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground2" SID 4661 Position [705, 449, 725, 461] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground20" SID 4662 Position [705, 74, 725, 86] BackgroundColor "[0.562974, 0.147652, 1.000000]" ShowName off } Block { BlockType Ground Name "Ground3" SID 4663 Position [705, 474, 725, 486] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground4" SID 4664 Position [705, 499, 725, 511] BackgroundColor "green" ShowName off } Block { BlockType Ground Name "Ground5" SID 4665 Position [705, 549, 725, 561] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground6" SID 4666 Position [705, 574, 725, 586] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground7" SID 4667 Position [705, 599, 725, 611] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground8" SID 4668 Position [705, 624, 725, 636] BackgroundColor "red" ShowName off } Block { BlockType Ground Name "Ground9" SID 4669 Position [705, 649, 725, 661] BackgroundColor "red" ShowName off } Block { BlockType SubSystem Name "Hierarchy Loops" SID 5028 Ports [1, 4] Position [245, 619, 445, 821] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Hierarchy Loops" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_ETMY_IN [m]" SID 5029 Position [25, 248, 55, 262] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "Actuator-to-Euler Transform" SID 5030 Ports [4, 4] Position [1395, 50, 1545, 345] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Actuator-to-Euler Transform" Location [12, 45, 964, 1406] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP_OSEM_IN [N]" SID 5031 Position [65, 48, 95, 62] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_OSEM_IN [N]" SID 5032 Position [65, 123, 95, 137] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_OSEM_IN [N]" SID 5033 Position [65, 198, 95, 212] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "TST_OSEM_IN [N]" SID 5034 Position [65, 273, 95, 287] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 5035 Position [145, 264, 180, 296] BackgroundColor "cyan" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 5036 Position [145, 39, 180, 71] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "2" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 5037 Position [145, 114, 180, 146] BackgroundColor "green" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain5" SID 5038 Position [145, 189, 180, 221] BackgroundColor "red" Gain "4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_L_OUT [N]" SID 5039 Position [230, 48, 260, 62] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_OUT [N]" SID 5040 Position [230, 123, 260, 137] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_OUT [N]" SID 5041 Position [230, 198, 260, 212] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_OUT [N]" SID 5042 Position [230, 273, 260, 287] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "TOP_OSEM_IN [N]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "TOP_L_OUT [N]" DstPort 1 } Line { SrcBlock "UIM_OSEM_IN [N]" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "UIM_L_OUT [N]" DstPort 1 } Line { SrcBlock "PUM_OSEM_IN [N]" SrcPort 1 DstBlock "Gain5" DstPort 1 } Line { SrcBlock "Gain5" SrcPort 1 DstBlock "PUM_L_OUT [N]" DstPort 1 } Line { SrcBlock "TST_OSEM_IN [N]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "TST_L_OUT [N]" DstPort 1 } Annotation { Name "4 coil-magnet\nactuators" Position [163, 175] } Annotation { Name "4 coil-magnet\nactuators" Position [163, 100] } Annotation { Name "2 coil-magnet\nactuators" Position [163, 25] } Annotation { Name "4 ESD Quadrants" Position [163, 255] } } } Block { BlockType SubSystem Name "Anti-Aliasing Chassis" SID 5043 Ports [5, 5] Position [940, 47, 1080, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Anti-Aliasing Chassis" Location [274, 45, 895, 1133] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP In [V[" SID 5044 Position [60, 58, 90, 72] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM In [V]" SID 5045 Position [60, 123, 90, 137] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM In [V]" SID 5046 Position [60, 188, 90, 202] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Ctrl In [V]" SID 5047 Position [60, 258, 90, 272] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Bias In [V]" SID 5048 Position [60, 328, 90, 342] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 5049 Position [170, 40, 245, 90] BackgroundColor "[0.000000, 0.400000, 1.000000]" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 5050 Position [170, 105, 245, 155] BackgroundColor "green" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 5051 Position [170, 170, 245, 220] BackgroundColor "red" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 5052 Position [170, 240, 245, 290] BackgroundColor "cyan" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 5053 Position [170, 310, 245, 360] BackgroundColor "cyan" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP Out [V]" SID 5054 Position [310, 58, 340, 72] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [V]" SID 5055 Position [310, 123, 340, 137] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out[V]" SID 5056 Position [310, 188, 340, 202] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out V]" SID 5057 Position [310, 258, 340, 272] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out [V]" SID 5058 Position [310, 328, 340, 342] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "UIM Out [V]" DstPort 1 } Line { SrcBlock "UIM In [V]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "PUM Out[V]" DstPort 1 } Line { SrcBlock "PUM In [V]" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "TOP Out [V]" DstPort 1 } Line { SrcBlock "TOP In [V[" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "ESD Ctrl Out V]" DstPort 1 } Line { SrcBlock "ESD Ctrl In [V]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "ESD Bias Out [V]" DstPort 1 } Line { SrcBlock "ESD Bias In [V]" SrcPort 1 DstBlock "Gain4" DstPort 1 } } } Block { BlockType SubSystem Name "COILOUTF" SID 5059 Ports [5, 5] Position [605, 47, 745, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "COILOUTF" Location [12, 45, 1544, 1393] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0_IN [ct]" SID 5060 Position [30, 78, 60, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1_IN [ct]" SID 5061 Position [30, 183, 60, 197] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2_IN [ct]" SID 5062 Position [30, 293, 60, 307] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3_CTRL_IN [ct]" SID 5063 Position [30, 383, 60, 397] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "L3_BIAS_IN [ct]" SID 5064 Position [30, 413, 60, 427] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "L1" SID 5065 Ports [1, 1] Position [250, 160, 340, 220] BackgroundColor "green" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L1" Location [160, 139, 1650, 1052] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5066 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 5067 Position [385, 39, 440, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5068 Position [665, 74, 720, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch2" SID 5069 Position [955, 109, 1010, 211] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcq\n[10:1]" SID 5070 Position [1065, 132, 1170, 188] BackgroundColor "green" Zeros "-2*pi*[300]" Poles "-2*pi*[50]" Gain "[50/300]" } Block { BlockType ZeroPole Name "antiLP1\n[1:10.5]" SID 5071 Position [195, 27, 300, 83] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType ZeroPole Name "antiLP2\n[1:10.5]" SID 5072 Position [475, 62, 580, 118] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType ZeroPole Name "antiLP3\n[1:10.5]" SID 5073 Position [755, 97, 860, 153] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10.5]" Gain "[10.5/1]" } Block { BlockType Constant Name "drivers.uim.state.lp1" SID 5074 Position [315, 79, 350, 101] Value "ifoParams.act.drivers.uim.state.lp1" } Block { BlockType Constant Name "drivers.uim.state.lp2" SID 5075 Position [595, 114, 630, 136] Value "ifoParams.act.drivers.uim.state.lp2" } Block { BlockType Constant Name "drivers.uim.state.lp3" SID 5076 Position [885, 149, 920, 171] Value "ifoParams.act.drivers.uim.state.lp3" } Block { BlockType Outport Name "Out [ct]" SID 5077 Position [1225, 153, 1255, 167] IconDisplay "Port number" } Line { SrcBlock "drivers.uim.state.lp1" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "antiLP1\n[1:10.5]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Switch" SrcPort 1 Points [10, 0] Branch { Points [0, 70] DstBlock "Switch1" DstPort 3 } Branch { DstBlock "antiLP2\n[1:10.5]" DstPort 1 } } Line { SrcBlock "antiLP2\n[1:10.5]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp2" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "Switch1" SrcPort 1 Points [10, 0] Branch { Points [0, 70] DstBlock "Switch2" DstPort 3 } Branch { DstBlock "antiLP3\n[1:10.5]" DstPort 1 } } Line { SrcBlock "antiLP3\n[1:10.5]" SrcPort 1 DstBlock "Switch2" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp3" SrcPort 1 DstBlock "Switch2" DstPort 2 } Line { SrcBlock "In [ct]" SrcPort 1 Points [110, 0] Branch { DstBlock "antiLP1\n[1:10.5]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "Switch2" SrcPort 1 DstBlock "antiAcq\n[10:1]" DstPort 1 } Line { SrcBlock "antiAcq\n[10:1]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [124, 197] } } } Block { BlockType SubSystem Name "L2" SID 5078 Ports [1, 1] Position [250, 270, 340, 330] BackgroundColor "red" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L2" Location [12, 289, 1093, 1314] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5079 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 5080 Position [445, 39, 500, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5081 Position [825, 74, 880, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcqOff\n[110:12]" SID 5082 Position [585, 134, 705, 186] BackgroundColor "green" Zeros "-2*pi*[110]" Poles "-2*pi*[12]" Gain "12/110" } Block { BlockType ZeroPole Name "antiAcqOn\n[80.5:1.35]" SID 5083 Position [585, 64, 705, 116] BackgroundColor "green" NamePlacement "alternate" Zeros "-2*pi*[80.5]" Poles "-2*pi*[1.35]" Gain "1.35/80.5" } Block { BlockType ZeroPole Name "antiLpOn\n[(0.5 250):(6 20)]" SID 5084 Position [190, 28, 360, 82] BackgroundColor "green" Zeros "-2*pi*[0.5 250]" Poles "-2*pi*[6 20]" Gain "(6*20)/(0.5*250)" } Block { BlockType Constant Name "drivers.pum.state.lp" SID 5085 Position [375, 79, 410, 101] Value "ifoParams.act.drivers.pum.state.lp" } Block { BlockType Constant Name "drivers.top.state.acq" SID 5086 Position [755, 114, 790, 136] Value "ifoParams.act.drivers.pum.state.acq" } Block { BlockType Outport Name "Out [ct]" SID 5087 Position [905, 118, 935, 132] IconDisplay "Port number" } Line { SrcBlock "drivers.pum.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Switch" SrcPort 1 Points [35, 0] Branch { DstBlock "antiAcqOn\n[80.5:1.35]" DstPort 1 } Branch { Points [0, 70] DstBlock "antiAcqOff\n[110:12]" DstPort 1 } } Line { SrcBlock "antiAcqOn\n[80.5:1.35]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.top.state.acq" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "In [ct]" SrcPort 1 Points [105, 0] Branch { DstBlock "antiLpOn\n[(0.5 250):(6 20)]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "antiLpOn\n[(0.5 250):(6 20)]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "antiAcqOff\n[110:12]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [119, 217] } } } Block { BlockType SubSystem Name "L3" SID 5088 Ports [2, 2] Position [250, 375, 340, 435] BackgroundColor "cyan" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L3" Location [547, 153, 1106, 1173] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Ctrl In [V]" SID 5089 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "Bias In [V]" SID 5090 Position [25, 138, 55, 152] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "Ctrl Out [V]" SID 5091 Position [340, 48, 370, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Bias Out [V]" SID 5092 Position [340, 138, 370, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "Ctrl In [V]" SrcPort 1 DstBlock "Ctrl Out [V]" DstPort 1 } Line { SrcBlock "Bias In [V]" SrcPort 1 DstBlock "Bias Out [V]" DstPort 1 } Annotation { Name "2 kHz Pole is not digitally compensated " Position [204, 191] } } } Block { BlockType SubSystem Name "M0" SID 5093 Ports [1, 1] Position [250, 55, 340, 115] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "M0" Location [49, 45, 997, 967] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [ct]" SID 5094 Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Switch Name "Switch" SID 5095 Position [390, 74, 445, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "antiAcq\n[1:31]" SID 5096 Position [520, 96, 605, 154] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[31]" Gain "[31/1]" } Block { BlockType ZeroPole Name "antiLP\n[1:10]" SID 5097 Position [220, 61, 305, 119] BackgroundColor "green" Zeros "-2*pi*[1]" Poles "-2*pi*[10]" Gain "[10/1]" } Block { BlockType Constant Name "drivers.top.state.lp" SID 5098 Position [320, 114, 355, 136] Value "ifoParams.act.drivers.top.state.lp" } Block { BlockType Outport Name "Out [ct]" SID 5099 Position [660, 118, 690, 132] IconDisplay "Port number" } Line { SrcBlock "Switch" SrcPort 1 DstBlock "antiAcq\n[1:31]" DstPort 1 } Line { SrcBlock "antiLP\n[1:10]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "In [ct]" SrcPort 1 Points [115, 0] Branch { DstBlock "antiLP\n[1:10]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "antiAcq\n[1:31]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "drivers.top.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [109, 232] } } } Block { BlockType Outport Name "M0_OUT [ct]" SID 5100 Position [540, 78, 570, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "L1_OUT [ct]" SID 5101 Position [540, 183, 570, 197] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "L2_OUT [ct]" SID 5102 Position [540, 293, 570, 307] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "L3_CTRL_OUT [ct]" SID 5103 Position [540, 383, 570, 397] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "L3_BIAS_OUT [ct]" SID 5104 Position [540, 413, 570, 427] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "M0" SrcPort 1 DstBlock "M0_OUT [ct]" DstPort 1 } Line { SrcBlock "M0_IN [ct]" SrcPort 1 DstBlock "M0" DstPort 1 } Line { SrcBlock "L2_IN [ct]" SrcPort 1 DstBlock "L2" DstPort 1 } Line { SrcBlock "L1_IN [ct]" SrcPort 1 DstBlock "L1" DstPort 1 } Line { SrcBlock "L3" SrcPort 1 DstBlock "L3_CTRL_OUT [ct]" DstPort 1 } Line { SrcBlock "L3_CTRL_IN [ct]" SrcPort 1 DstBlock "L3" DstPort 1 } Line { SrcBlock "L1" SrcPort 1 DstBlock "L1_OUT [ct]" DstPort 1 } Line { SrcBlock "L2" SrcPort 1 DstBlock "L2_OUT [ct]" DstPort 1 } Line { SrcBlock "L3" SrcPort 2 DstBlock "L3_BIAS_OUT [ct]" DstPort 1 } Line { SrcBlock "L3_BIAS_IN [ct]" SrcPort 1 DstBlock "L3" DstPort 2 } Annotation { Name "See T1100378 and LLO aLOG 4495 for reference" Position [142, 22] } } } Block { BlockType SubSystem Name "DAC" SID 5105 Ports [5, 5] Position [770, 47, 910, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DAC" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0 In [cts]" SID 5106 Position [60, 58, 90, 72] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1 In [cts]" SID 5107 Position [60, 148, 90, 162] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2 In [cts]" SID 5108 Position [60, 238, 90, 252] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3 Ctrl In [cts]" SID 5109 Position [60, 333, 90, 347] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "L3 Bias In [cts]" SID 5110 Position [60, 403, 90, 417] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 5111 Position [170, 40, 245, 90] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 5112 Position [170, 130, 245, 180] BackgroundColor "green" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 5113 Position [170, 220, 245, 270] BackgroundColor "red" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 5114 Position [170, 315, 245, 365] BackgroundColor "cyan" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 5115 Position [170, 385, 245, 435] BackgroundColor "cyan" Gain "ifoParams.act.dacGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "PumDac" SID 5553 Tag "NbNoiseSource" Ports [0, 1] Position [392, 185, 408, 210] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadPumDac" } Block { BlockType Sum Name "Sum" SID 5550 Ports [2, 1] Position [390, 55, 410, 75] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 5552 Ports [2, 1] Position [390, 145, 410, 165] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5554 Ports [2, 1] Position [390, 235, 410, 255] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "TopDac" SID 5549 Tag "NbNoiseSource" Ports [0, 1] Position [392, 5, 408, 30] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadTopDac" } Block { BlockType Reference Name "UimDac" SID 5551 Tag "NbNoiseSource" Ports [0, 1] Position [392, 95, 408, 120] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadUimDac" } Block { BlockType Outport Name "TOP Out [V]" SID 5116 Position [600, 58, 630, 72] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [V]" SID 5117 Position [600, 148, 630, 162] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out[V]" SID 5118 Position [600, 238, 630, 252] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out V]" SID 5119 Position [600, 333, 630, 347] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out [V]" SID 5120 Position [600, 403, 630, 417] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "L1 In [cts]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "L2 In [cts]" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "M0 In [cts]" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "L3 Ctrl In [cts]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "ESD Bias Out [V]" DstPort 1 } Line { SrcBlock "L3 Bias In [cts]" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "TOP Out [V]" DstPort 1 } Line { SrcBlock "TopDac" SrcPort 1 DstBlock "Sum" DstPort 1 } Line { SrcBlock "UimDac" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "UIM Out [V]" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "PUM Out[V]" DstPort 1 } Line { SrcBlock "PumDac" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "ESD Ctrl Out V]" DstPort 1 } Annotation { Name "ifoParams.act.dacGain \n[V/ct]" Position [199, 27] } } } Block { BlockType SubSystem Name "Driver Electronics" SID 5121 Ports [5, 5] Position [1110, 47, 1245, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Driver Electronics" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "TOP In [V]" SID 5122 Position [30, 78, 60, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "UIM In [V]" SID 5123 Position [30, 183, 60, 197] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PUM In [V]" SID 5124 Position [30, 293, 60, 307] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Ctrl In [V]" SID 5125 Position [30, 383, 60, 397] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "ESD Bias In [V]" SID 5126 Position [30, 413, 60, 427] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType SubSystem Name "ESD Driver" SID 5127 Ports [2, 2] Position [250, 375, 340, 435] BackgroundColor "cyan" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ESD Driver" Location [547, 153, 1106, 1173] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Ctrl In [V]" SID 5128 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Inport Name "Bias In [V]" SID 5129 Position [25, 138, 55, 152] Port "2" IconDisplay "Port number" } Block { BlockType Gain Name "DC Gain1" SID 5130 Position [80, 123, 145, 167] Gain "1.1" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "DC Gain3" SID 5131 Position [80, 33, 145, 77] Gain "1.1" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L3_ESD_filter\n[(none):(2000)]" SID 5132 Position [205, 28, 315, 82] BackgroundColor "green" Zeros "[]" Poles "-2*pi*[2000]" Gain "[2*pi*2000]" } Block { BlockType ZeroPole Name "L3_ESD_filter\n[(none):(2000)]1" SID 5133 Position [205, 118, 315, 172] BackgroundColor "green" Zeros "[]" Poles "-2*pi*[2000]" Gain "[2*pi*2000]" } Block { BlockType Outport Name "Ctrl Out [V]" SID 5134 Position [340, 48, 370, 62] IconDisplay "Port number" } Block { BlockType Outport Name "Bias Out [V]" SID 5135 Position [340, 138, 370, 152] Port "2" IconDisplay "Port number" } Line { SrcBlock "DC Gain3" SrcPort 1 DstBlock "L3_ESD_filter\n[(none):(2000)]" DstPort 1 } Line { SrcBlock "Ctrl In [V]" SrcPort 1 DstBlock "DC Gain3" DstPort 1 } Line { SrcBlock "L3_ESD_filter\n[(none):(2000)]" SrcPort 1 DstBlock "Ctrl Out [V]" DstPort 1 } Line { SrcBlock "Bias In [V]" SrcPort 1 DstBlock "DC Gain1" DstPort 1 } Line { SrcBlock "DC Gain1" SrcPort 1 DstBlock "L3_ESD_filter\n[(none):(2000)]1" DstPort 1 } Line { SrcBlock "L3_ESD_filter\n[(none):(2000)]1" SrcPort 1 DstBlock "Bias Out [V]" DstPort 1 } } } Block { BlockType SubSystem Name "PUM Driver" SID 5136 Description "FlexTf: ifoParams.act.drivers.pum.frd" Ports [1, 1] Position [250, 270, 340, 330] BackgroundColor "red" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PUM Driver" Location [88, 45, 1202, 945] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [V]" SID 5137 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 5138 Position [80, 33, 145, 77] Gain "0.27e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L2_ACQOFF_filter\n[12:110]" SID 5139 Position [560, 134, 680, 186] BackgroundColor "green" Zeros "-2*pi*[12]" Poles "-2*pi*[110]" Gain "110/12" } Block { BlockType ZeroPole Name "L2_ACQON_filter\n[1.35:80.5]" SID 5140 Position [560, 64, 680, 116] BackgroundColor "green" NamePlacement "alternate" Zeros "-2*pi*[1.35]" Poles "-2*pi*[80.5]" Gain "80.5/1.35" } Block { BlockType ZeroPole Name "L2_LPON_filter\n[(0.5 250):(6 20)]" SID 5141 Position [190, 24, 345, 86] BackgroundColor "green" Zeros "-2*pi*[6 20]" Poles "-2*pi*[0.5 250]" Gain "(0.5*250)/(6*20)" } Block { BlockType Switch Name "Switch" SID 5142 Position [425, 39, 480, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5143 Position [805, 74, 860, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.pum.state.lp" SID 5144 Position [355, 79, 390, 101] Value "ifoParams.act.drivers.pum.state.lp" } Block { BlockType Constant Name "drivers.top.state.acq" SID 5145 Position [735, 114, 770, 136] Value "ifoParams.act.drivers.pum.state.acq" } Block { BlockType Outport Name "Out [A]" SID 5146 Position [885, 118, 915, 132] IconDisplay "Port number" } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [15, 0] Branch { DstBlock "L2_LPON_filter\n[(0.5 250):(6 20)]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "drivers.pum.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Switch" SrcPort 1 Points [35, 0] Branch { Points [0, 70] DstBlock "L2_ACQOFF_filter\n[12:110]" DstPort 1 } Branch { DstBlock "L2_ACQON_filter\n[1.35:80.5]" DstPort 1 } } Line { SrcBlock "L2_ACQON_filter\n[1.35:80.5]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.top.state.acq" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Line { SrcBlock "L2_LPON_filter\n[(0.5 250):(6 20)]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "L2_ACQOFF_filter\n[12:110]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [119, 217] } } } Block { BlockType Reference Name "PumSelf" SID 5535 Tag "NbNoiseSource" Ports [0, 1] Position [427, 240, 443, 265] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadPumSelf" } Block { BlockType SubSystem Name "QTOP Driver" SID 5147 Description "FlexTf: ifoParams.act.drivers.top.frd" Ports [1, 1] Position [250, 55, 340, 115] BackgroundColor "[0.000000, 0.400000, 1.000000]" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QTOP Driver" Location [49, 45, 997, 967] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [V]" SID 5148 Position [25, 83, 55, 97] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 5149 Position [80, 68, 145, 112] Gain "9.9e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "LP_filter\n[10:1]" SID 5150 Position [220, 61, 305, 119] BackgroundColor "green" Zeros "-2*pi*[10]" Poles "-2*pi*[1]" Gain "[1/10]" } Block { BlockType ZeroPole Name "M0_Output_Filter\n[31:0.9]" SID 5151 Position [520, 96, 605, 154] BackgroundColor "green" Zeros "-2*pi*[31]" Poles "-2*pi*[0.9]" Gain "[0.9/31]" } Block { BlockType Switch Name "Switch" SID 5152 Position [390, 74, 445, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.top.state.lp" SID 5153 Position [320, 114, 355, 136] Value "ifoParams.act.drivers.top.state.lp" } Block { BlockType Outport Name "Out [A]" SID 5154 Position [660, 118, 690, 132] IconDisplay "Port number" } Line { SrcBlock "Switch" SrcPort 1 DstBlock "M0_Output_Filter\n[31:0.9]" DstPort 1 } Line { SrcBlock "LP_filter\n[10:1]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [25, 0] Branch { DstBlock "LP_filter\n[10:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "M0_Output_Filter\n[31:0.9]" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Line { SrcBlock "drivers.top.state.lp" SrcPort 1 DstBlock "Switch" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [109, 232] } } } Block { BlockType Sum Name "Sum" SID 5532 Ports [2, 1] Position [425, 75, 445, 95] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum1" SID 5534 Ports [2, 1] Position [425, 180, 445, 200] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5536 Ports [2, 1] Position [425, 290, 445, 310] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "TopSelf" SID 5531 Tag "NbNoiseSource" Ports [0, 1] Position [427, 25, 443, 50] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadTopSelf" } Block { BlockType SubSystem Name "UIM Driver" SID 5155 Description "FlexTf: ifoParams.act.drivers.uim.frd" Ports [1, 1] Position [250, 160, 340, 220] BackgroundColor "green" AttributesFormatString "%" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "UIM Driver" Location [66, 213, 1556, 1126] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [V]" SID 5156 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transconductance" SID 5157 Position [80, 33, 145, 77] Gain "0.15e-3" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "L1_LP1_filter\n[10.5:1]" SID 5158 Position [195, 27, 300, 83] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_LP2_filter\n[10.5:1]" SID 5159 Position [475, 62, 580, 118] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_LP3_filter\n[10.5:1]" SID 5160 Position [760, 97, 865, 153] BackgroundColor "green" Zeros "-2*pi*[10.5]" Poles "-2*pi*[1]" Gain "[1/10.5]" } Block { BlockType ZeroPole Name "L1_Output_filter\n[50:300]" SID 5161 Position [1065, 132, 1170, 188] BackgroundColor "green" Zeros "-2*pi*[50]" Poles "-2*pi*[300]" Gain "[300/50]" } Block { BlockType Switch Name "Switch" SID 5162 Position [385, 39, 440, 141] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5163 Position [665, 74, 720, 176] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch2" SID 5164 Position [955, 109, 1010, 211] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "drivers.uim.state.lp1" SID 5165 Position [315, 79, 350, 101] Value "ifoParams.act.drivers.uim.state.lp1" } Block { BlockType Constant Name "drivers.uim.state.lp2" SID 5166 Position [595, 114, 630, 136] Value "ifoParams.act.drivers.uim.state.lp2" } Block { BlockType Constant Name "drivers.uim.state.lp3" SID 5167 Position [885, 149, 920, 171] Value "ifoParams.act.drivers.uim.state.lp3" } Block { BlockType Outport Name "Out [A]" SID 5168 Position [1225, 153, 1255, 167] IconDisplay "Port number" } Line { SrcBlock "DC Transconductance" SrcPort 1 Points [20, 0] Branch { DstBlock "L1_LP1_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch" DstPort 3 } } Line { SrcBlock "drivers.uim.state.lp1" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "L1_LP1_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Switch" SrcPort 1 Points [10, 0] Branch { DstBlock "L1_LP2_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch1" DstPort 3 } } Line { SrcBlock "L1_LP2_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch1" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp2" SrcPort 1 DstBlock "Switch1" DstPort 2 } Line { SrcBlock "Switch1" SrcPort 1 Points [10, 0] Branch { DstBlock "L1_LP3_filter\n[10.5:1]" DstPort 1 } Branch { Points [0, 70] DstBlock "Switch2" DstPort 3 } } Line { SrcBlock "L1_LP3_filter\n[10.5:1]" SrcPort 1 DstBlock "Switch2" DstPort 1 } Line { SrcBlock "drivers.uim.state.lp3" SrcPort 1 DstBlock "Switch2" DstPort 2 } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Transconductance" DstPort 1 } Line { SrcBlock "Switch2" SrcPort 1 DstBlock "L1_Output_filter\n[50:300]" DstPort 1 } Line { SrcBlock "L1_Output_filter\n[50:300]" SrcPort 1 DstBlock "Out [A]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [124, 197] } } } Block { BlockType Reference Name "UimSelf" SID 5533 Tag "NbNoiseSource" Ports [0, 1] Position [427, 130, 443, 155] BlockRotation 270 BlockMirror on BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'QUAD Actuator'" asd "ifoParams.darmNb.quadUimSelf" } Block { BlockType Outport Name "TOP Out [A]" SID 5169 Position [540, 78, 570, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM Out [A]" SID 5170 Position [540, 183, 570, 197] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM Out [A]" SID 5171 Position [540, 293, 570, 307] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Ctrl Out[V]" SID 5172 Position [540, 383, 570, 397] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "ESD Bias Out[V]" SID 5173 Position [540, 413, 570, 427] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Line { SrcBlock "TOP In [V]" SrcPort 1 DstBlock "QTOP Driver" DstPort 1 } Line { SrcBlock "PUM In [V]" SrcPort 1 DstBlock "PUM Driver" DstPort 1 } Line { SrcBlock "UIM In [V]" SrcPort 1 DstBlock "UIM Driver" DstPort 1 } Line { SrcBlock "ESD Driver" SrcPort 1 DstBlock "ESD Ctrl Out[V]" DstPort 1 } Line { SrcBlock "ESD Ctrl In [V]" SrcPort 1 DstBlock "ESD Driver" DstPort 1 } Line { SrcBlock "ESD Driver" SrcPort 2 DstBlock "ESD Bias Out[V]" DstPort 1 } Line { SrcBlock "ESD Bias In [V]" SrcPort 1 DstBlock "ESD Driver" DstPort 2 } Line { SrcBlock "QTOP Driver" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "TopSelf" SrcPort 1 DstBlock "Sum" DstPort 1 } Line { SrcBlock "Sum" SrcPort 1 DstBlock "TOP Out [A]" DstPort 1 } Line { SrcBlock "UIM Driver" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "UIM Out [A]" DstPort 1 } Line { SrcBlock "UimSelf" SrcPort 1 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "PUM Driver" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "PUM Out [A]" DstPort 1 } Line { SrcBlock "PumSelf" SrcPort 1 DstBlock "Sum2" DstPort 1 } Annotation { Name "See T1100378 and LLO aLOG 4495 for reference" Position [142, 22] } } } Block { BlockType SubSystem Name "Driver Force Coefficient" SID 5174 Ports [5, 4] Position [1275, 47, 1370, 343] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Driver Force Coefficient" Location [352, 45, 1269, 1517] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "102" Block { BlockType Inport Name "In1[A]" SID 5175 Position [40, 58, 70, 72] IconDisplay "Port number" } Block { BlockType Inport Name "In2[A]" SID 5176 Position [40, 153, 70, 167] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "In3[A]" SID 5177 Position [40, 243, 70, 257] Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "Vsig[V]" SID 5178 Position [40, 333, 70, 347] Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "Vbias[V]" SID 5179 Position [40, 378, 70, 392] Port "5" IconDisplay "Port number" } Block { BlockType Gain Name "Gain" SID 5180 Position [220, 43, 285, 87] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "1.694" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain1" SID 5181 Position [220, 140, 290, 180] BackgroundColor "green" Gain "1.694" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain2" SID 5182 Position [220, 229, 290, 271] BackgroundColor "red" Gain "0.0309" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain7" SID 5183 Position [290, 343, 415, 387] BackgroundColor "cyan" Gain "4.2e-10 / 4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Math Name "Math\nFunction" SID 5184 Ports [1, 1] Position [235, 350, 265, 380] Operator "square" } Block { BlockType Sum Name "Subtract" SID 5185 Ports [2, 1] Position [185, 319, 210, 406] Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "TOP_Out [N]" SID 5186 Position [655, 58, 685, 72] IconDisplay "Port number" } Block { BlockType Outport Name "UIM_Out [N]" SID 5187 Position [655, 153, 685, 167] Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_Out [N]" SID 5188 Position [655, 243, 685, 257] Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_Out [N]" SID 5189 Position [655, 358, 685, 372] Port "4" IconDisplay "Port number" } Line { SrcBlock "In3[A]" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "In2[A]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "In1[A]" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "PUM_Out [N]" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "UIM_Out [N]" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 DstBlock "TOP_Out [N]" DstPort 1 } Line { SrcBlock "Vsig[V]" SrcPort 1 DstBlock "Subtract" DstPort 1 } Line { SrcBlock "Subtract" SrcPort 1 DstBlock "Math\nFunction" DstPort 1 } Line { SrcBlock "Math\nFunction" SrcPort 1 DstBlock "Gain7" DstPort 1 } Line { SrcBlock "Gain7" SrcPort 1 DstBlock "TST_Out [N]" DstPort 1 } Line { SrcBlock "Vbias[V]" SrcPort 1 DstBlock "Subtract" DstPort 2 } Annotation { Name "See T1100378" Position [174, 526] } Annotation { Name "Current to Force [N/A]" Position [263, 215] } Annotation { Name "Current to Force [N/A]" Position [268, 130] } Annotation { Name "Current to Force [N/A]" Position [228, 30] } } } Block { BlockType SubSystem Name "EUL2OSEM" SID 5190 Ports [4, 4] Position [440, 46, 580, 284] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "EUL2OSEM" Location [419, 45, 945, 1046] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "M0_L_IN [ct]" SID 5191 Position [55, 63, 85, 77] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "L1_L_IN [ct]" SID 5192 Position [55, 138, 85, 152] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "L2_L_IN [ct]" SID 5193 Position [55, 213, 85, 227] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "L3_L_IN [ct]" SID 5194 Position [55, 288, 85, 302] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 5195 Position [190, 279, 225, 311] BackgroundColor "cyan" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 5196 Position [190, 54, 225, 86] BackgroundColor "[0.000000, 0.400000, 1.000000]" Gain "1/2" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 5197 Position [190, 129, 225, 161] BackgroundColor "green" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain5" SID 5198 Position [190, 204, 225, 236] BackgroundColor "red" Gain "1/4" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "M0_OSEM_OUT [ct]" SID 5199 Position [320, 63, 350, 77] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "L1_OSEM_OUT [ct]" SID 5200 Position [320, 138, 350, 152] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "L2_OSEM_OUT [ct]" SID 5201 Position [320, 213, 350, 227] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "L3_OSEM_OUT [ct]" SID 5202 Position [320, 288, 350, 302] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "M0_L_IN [ct]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "L1_L_IN [ct]" SrcPort 1 DstBlock "Gain4" DstPort 1 } Line { SrcBlock "L2_L_IN [ct]" SrcPort 1 DstBlock "Gain5" DstPort 1 } Line { SrcBlock "L3_L_IN [ct]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "M0_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "L1_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain5" SrcPort 1 DstBlock "L2_OSEM_OUT [ct]" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "L3_OSEM_OUT [ct]" DstPort 1 } Annotation { Name "4 coil-magnet\nactuators" Position [208, 190] } Annotation { Name "4 coil-magnet\nactuators" Position [208, 115] } Annotation { Name "2 coil-magnet\nactuators" Position [208, 40] } Annotation { Name "4 ESD Quadrants" Position [208, 270] } } } Block { BlockType SubSystem Name "L1 LOCK" SID 5203 Ports [1, 1] Position [280, 117, 400, 153] BackgroundColor "green" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L1 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 5204 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 5205 Description "FlexTf: ifoParams.act.L1.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 5206 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 5207 Description "FlexTf: ifoParams.act.L1.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 5208 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 5209 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 5210 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 5211 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 5212 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 5213 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 5214 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L1.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 5215 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L1.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L1_OUT [ct]" SID 5216 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L1_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "L2 LOCK" SID 5217 Ports [1, 1] Position [280, 177, 400, 213] BackgroundColor "red" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L2 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 5218 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 5219 Description "FlexTf: ifoParams.act.L2.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 5220 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 5221 Description "FlexTf: ifoParams.act.L2.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 5222 Description "FlexTf: ifoParams.act.L2.lock(3).frd" Ports [1, 1] Position [345, 25, 425, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 5223 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 5224 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 5225 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 5226 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 5227 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 5228 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L2.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 5229 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L2.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L2_OUT [ct]" SID 5230 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L2_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "L3 LOCK" SID 5231 Ports [1, 1] Position [280, 237, 400, 273] BackgroundColor "cyan" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "L3 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 5232 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 5233 Description "FlexTf: ifoParams.act.L3.lock(1).frd" Ports [1, 1] Position [145, 25, 225, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 5234 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 5235 Description "FlexTf: ifoParams.act.L3.lock(2).frd" Ports [1, 1] Position [245, 25, 325, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 5236 Description "FlexTf: ifoParams.act.L3.lock(3).frd" Ports [1, 1] Position [345, 25, 425, 75] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 5237 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 5238 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 5239 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 5240 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 5241 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 5242 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.L3.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 5243 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.L3.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "L3_OUT [ct]" SID 5244 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "L3_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "LSC_ETMY" SID 5245 Ports [1, 1] Position [90, 235, 225, 275] BackgroundColor "cyan" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "LSC_ETMY" Location [335, 45, 1505, 927] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_ETMX_IN" SID 5246 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 5247 Ports [1, 1] Position [145, 25, 225, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 5248 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 5249 Ports [1, 1] Position [245, 25, 325, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 5250 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 5251 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 5252 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 5253 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 5254 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 5255 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 5256 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.lsc.etmx(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 5257 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.lsc.etmxGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "LSC_ETMX_OUT " SID 5258 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_ETMX_IN" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "LSC_ETMX_OUT " DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType SubSystem Name "M0 LOCK" SID 5259 Ports [1, 1] Position [280, 57, 400, 93] BackgroundColor "[0.000000, 0.400000, 1.000000]" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "M0 LOCK" Location [12, 45, 1028, 1357] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "LSC_IN [m]" SID 5260 Position [60, 43, 90, 57] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 5261 Ports [1, 1] Position [145, 25, 225, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 5262 Ports [1, 1] Position [545, 115, 625, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 5263 Ports [1, 1] Position [245, 25, 325, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 5264 Ports [1, 1] Position [345, 25, 425, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 5265 Ports [1, 1] Position [445, 25, 525, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 5266 Ports [1, 1] Position [545, 25, 625, 75] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 5267 Ports [1, 1] Position [145, 115, 225, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 5268 Ports [1, 1] Position [245, 115, 325, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 5269 Ports [1, 1] Position [345, 115, 425, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 5270 Ports [1, 1] Position [445, 115, 525, 165] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.M0.lock(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 5271 Position [660, 102, 820, 178] ShowName off Gain "ifoParams.act.M0.lockGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "M0_OUT [ct]" SID 5272 Position [875, 133, 905, 147] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "LSC_IN [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "M0_OUT [ct]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 55; -500, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType Constant Name "esdBias_ct" SID 5273 Position [320, 308, 355, 322] BackgroundColor "cyan" Value "ifoParams.act.esdBias_ct" } Block { BlockType Outport Name "TOP_L_DRIVE_OUT [N]" SID 5274 Position [1600, 78, 1630, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_DRIVE_OUT [N]" SID 5275 Position [1600, 153, 1630, 167] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_DRIVE_OUT [N]" SID 5276 Position [1600, 228, 1630, 242] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_DRIVE_OUT [N]" SID 5277 Position [1600, 303, 1630, 317] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Line { SrcBlock "Driver Force Coefficient" SrcPort 1 DstBlock "Actuator-to-Euler Transform" DstPort 1 } Line { SrcBlock "Driver Force Coefficient" SrcPort 2 DstBlock "Actuator-to-Euler Transform" DstPort 2 } Line { SrcBlock "Driver Force Coefficient" SrcPort 3 DstBlock "Actuator-to-Euler Transform" DstPort 3 } Line { SrcBlock "Driver Force Coefficient" SrcPort 4 DstBlock "Actuator-to-Euler Transform" DstPort 4 } Line { SrcBlock "DAC" SrcPort 1 DstBlock "Anti-Aliasing Chassis" DstPort 1 } Line { SrcBlock "DAC" SrcPort 2 DstBlock "Anti-Aliasing Chassis" DstPort 2 } Line { SrcBlock "DAC" SrcPort 3 DstBlock "Anti-Aliasing Chassis" DstPort 3 } Line { SrcBlock "DAC" SrcPort 4 DstBlock "Anti-Aliasing Chassis" DstPort 4 } Line { SrcBlock "DAC" SrcPort 5 DstBlock "Anti-Aliasing Chassis" DstPort 5 } Line { SrcBlock "COILOUTF" SrcPort 1 DstBlock "DAC" DstPort 1 } Line { SrcBlock "COILOUTF" SrcPort 2 DstBlock "DAC" DstPort 2 } Line { SrcBlock "COILOUTF" SrcPort 3 DstBlock "DAC" DstPort 3 } Line { SrcBlock "COILOUTF" SrcPort 4 DstBlock "DAC" DstPort 4 } Line { SrcBlock "COILOUTF" SrcPort 5 DstBlock "DAC" DstPort 5 } Line { SrcBlock "M0 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 1 } Line { SrcBlock "EUL2OSEM" SrcPort 1 DstBlock "COILOUTF" DstPort 1 } Line { SrcBlock "EUL2OSEM" SrcPort 2 DstBlock "COILOUTF" DstPort 2 } Line { SrcBlock "EUL2OSEM" SrcPort 3 DstBlock "COILOUTF" DstPort 3 } Line { SrcBlock "EUL2OSEM" SrcPort 4 DstBlock "COILOUTF" DstPort 4 } Line { SrcBlock "esdBias_ct" SrcPort 1 DstBlock "COILOUTF" DstPort 5 } Line { SrcBlock "LSC_ETMY_IN [m]" SrcPort 1 DstBlock "LSC_ETMY" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 1 DstBlock "TOP_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 2 DstBlock "UIM_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 3 DstBlock "PUM_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Actuator-to-Euler Transform" SrcPort 4 DstBlock "TST_L_DRIVE_OUT [N]" DstPort 1 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 1 DstBlock "Driver Electronics" DstPort 1 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 2 DstBlock "Driver Electronics" DstPort 2 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 3 DstBlock "Driver Electronics" DstPort 3 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 4 DstBlock "Driver Electronics" DstPort 4 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 5 DstBlock "Driver Electronics" DstPort 5 } Line { SrcBlock "Driver Electronics" SrcPort 1 DstBlock "Driver Force Coefficient" DstPort 1 } Line { SrcBlock "Driver Electronics" SrcPort 2 DstBlock "Driver Force Coefficient" DstPort 2 } Line { SrcBlock "Driver Electronics" SrcPort 3 DstBlock "Driver Force Coefficient" DstPort 3 } Line { SrcBlock "Driver Electronics" SrcPort 4 DstBlock "Driver Force Coefficient" DstPort 4 } Line { SrcBlock "Driver Electronics" SrcPort 5 DstBlock "Driver Force Coefficient" DstPort 5 } Line { SrcBlock "L1 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 2 } Line { SrcBlock "L2 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 3 } Line { SrcBlock "L3 LOCK" SrcPort 1 DstBlock "EUL2OSEM" DstPort 4 } Line { SrcBlock "LSC_ETMY" SrcPort 1 Points [20, 0] Branch { Points [0, -60] Branch { Points [0, -60] Branch { Points [0, -60] DstBlock "M0 LOCK" DstPort 1 } Branch { DstBlock "L1 LOCK" DstPort 1 } } Branch { DstBlock "L2 LOCK" DstPort 1 } } Branch { DstBlock "L3 LOCK" DstPort 1 } } } } Block { BlockType SubSystem Name "QUAD" SID 5347 Ports [30, 24] Position [760, 64, 950, 821] BackgroundColor "[0.684877, 0.865332, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "QUAD" Location [12, 45, 964, 1406] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "GND_L_DISP_IN [m]" SID 5348 Position [45, 28, 75, 42] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "GND_T_DISP_IN [m]" SID 5349 Position [45, 58, 75, 72] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "GND_V_DISP_IN [m]" SID 5350 Position [45, 88, 75, 102] BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Inport Name "GND_R_DISP_IN [rad]" SID 5351 Position [45, 118, 75, 132] BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Block { BlockType Inport Name "GND_P_DISP_IN [rad]" SID 5352 Position [45, 148, 75, 162] BackgroundColor "yellow" Port "5" IconDisplay "Port number" } Block { BlockType Inport Name "GND_Y_DISP_IN [rad]" SID 5353 Position [45, 178, 75, 192] BackgroundColor "yellow" Port "6" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_L_DRIVE_IN [N]" SID 5354 Position [45, 208, 75, 222] BackgroundColor "yellow" Port "7" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_T_DRIVE_IN [N]" SID 5355 Position [45, 238, 75, 252] BackgroundColor "yellow" Port "8" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_V_DRIVE_IN [N]" SID 5356 Position [45, 268, 75, 282] BackgroundColor "yellow" Port "9" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_R_DRIVE_IN [N.m]" SID 5357 Position [45, 298, 75, 312] BackgroundColor "yellow" Port "10" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_P_DRIVE_IN [N.m]" SID 5358 Position [45, 328, 75, 342] BackgroundColor "yellow" Port "11" IconDisplay "Port number" } Block { BlockType Inport Name "TOP_Y_DRIVE_IN [N.m]" SID 5359 Position [45, 358, 75, 372] BackgroundColor "yellow" Port "12" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_L_DRIVE_IN [N]" SID 5360 Position [45, 388, 75, 402] BackgroundColor "yellow" Port "13" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_T_DRIVE_IN [N]" SID 5361 Position [45, 418, 75, 432] BackgroundColor "yellow" Port "14" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_V_DRIVE_IN [N]" SID 5362 Position [45, 448, 75, 462] BackgroundColor "yellow" Port "15" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_R_DRIVE_IN [N.m]" SID 5363 Position [45, 478, 75, 492] BackgroundColor "yellow" Port "16" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_P_DRIVE_IN [N.m]" SID 5364 Position [45, 508, 75, 522] BackgroundColor "yellow" Port "17" IconDisplay "Port number" } Block { BlockType Inport Name "UIM_Y_DRIVE_IN [N.m]" SID 5365 Position [45, 538, 75, 552] BackgroundColor "yellow" Port "18" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_L_DRIVE_IN [N]" SID 5366 Position [45, 568, 75, 582] BackgroundColor "yellow" Port "19" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_T_DRIVE_IN [N]" SID 5367 Position [45, 598, 75, 612] BackgroundColor "yellow" Port "20" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_V_DRIVE_IN [N]" SID 5368 Position [45, 628, 75, 642] BackgroundColor "yellow" Port "21" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_R_DRIVE_IN [N.m]" SID 5369 Position [45, 658, 75, 672] BackgroundColor "yellow" Port "22" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_P_DRIVE_IN [N.m]" SID 5370 Position [45, 688, 75, 702] BackgroundColor "yellow" Port "23" IconDisplay "Port number" } Block { BlockType Inport Name "PUM_Y_DRIVE_IN [N.m]" SID 5371 Position [45, 718, 75, 732] BackgroundColor "yellow" Port "24" IconDisplay "Port number" } Block { BlockType Inport Name "TST_L_DRIVE_IN [N]" SID 5372 Position [45, 748, 75, 762] BackgroundColor "yellow" Port "25" IconDisplay "Port number" } Block { BlockType Inport Name "TST_T_DRIVE_IN [N]" SID 5373 Position [45, 778, 75, 792] BackgroundColor "yellow" Port "26" IconDisplay "Port number" } Block { BlockType Inport Name "TST_V_DRIVE_IN [N]" SID 5374 Position [45, 808, 75, 822] BackgroundColor "yellow" Port "27" IconDisplay "Port number" } Block { BlockType Inport Name "TST_R_DRIVE_IN [N.m]" SID 5375 Position [45, 838, 75, 852] BackgroundColor "yellow" Port "28" IconDisplay "Port number" } Block { BlockType Inport Name "TST_P_DRIVE_IN [N.m]" SID 5376 Position [45, 868, 75, 882] BackgroundColor "yellow" Port "29" IconDisplay "Port number" } Block { BlockType Inport Name "TST_Y_DRIVE_IN [N.m]" SID 5377 Position [45, 898, 75, 912] BackgroundColor "yellow" Port "30" IconDisplay "Port number" } Block { BlockType Demux Name "Demux" SID 5378 Ports [1, 24] Position [590, 114, 595, 826] BackgroundColor "black" ShowName off Outputs "24" } Block { BlockType From Name "From" SID 5379 Position [725, 266, 815, 284] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DISP" } Block { BlockType From Name "From1" SID 5380 Position [725, 206, 815, 224] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DISP" } Block { BlockType From Name "From10" SID 5381 Position [260, 296, 350, 314] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DRIVE" } Block { BlockType From Name "From11" SID 5382 Position [260, 356, 350, 374] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DRIVE" } Block { BlockType From Name "From12" SID 5383 Position [260, 476, 350, 494] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DRIVE" } Block { BlockType From Name "From13" SID 5384 Position [260, 536, 350, 554] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DRIVE" } Block { BlockType From Name "From14" SID 5385 Position [260, 656, 350, 674] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DRIVE" } Block { BlockType From Name "From15" SID 5386 Position [260, 716, 350, 734] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DRIVE" } Block { BlockType From Name "From16" SID 5387 Position [260, 836, 350, 854] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DRIVE" } Block { BlockType From Name "From17" SID 5388 Position [260, 896, 350, 914] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DRIVE" } Block { BlockType From Name "From2" SID 5389 Position [725, 446, 815, 464] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DISP" } Block { BlockType From Name "From3" SID 5390 Position [725, 386, 815, 404] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DISP" } Block { BlockType From Name "From4" SID 5391 Position [725, 626, 815, 644] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DISP" } Block { BlockType From Name "From5" SID 5392 Position [725, 566, 815, 584] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DISP" } Block { BlockType From Name "From6" SID 5393 Position [725, 806, 815, 824] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DISP" } Block { BlockType From Name "From7" SID 5394 Position [725, 746, 815, 764] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DISP" } Block { BlockType From Name "From8" SID 5395 Position [260, 116, 350, 134] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "GND_Y_DISP" } Block { BlockType From Name "From9" SID 5396 Position [260, 176, 350, 194] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "GND_R_DISP" } Block { BlockType Goto Name "Goto" SID 5397 Position [615, 206, 710, 224] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto1" SID 5398 Position [615, 266, 710, 284] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto10" SID 5399 Position [150, 356, 245, 374] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TOP_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto11" SID 5400 Position [150, 296, 245, 314] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TOP_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto12" SID 5401 Position [150, 536, 245, 554] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto13" SID 5402 Position [150, 476, 245, 494] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto14" SID 5403 Position [150, 716, 245, 734] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto15" SID 5404 Position [150, 656, 245, 674] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto16" SID 5405 Position [150, 896, 245, 914] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto17" SID 5406 Position [150, 836, 245, 854] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DRIVE" TagVisibility "local" } Block { BlockType Goto Name "Goto2" SID 5407 Position [615, 386, 710, 404] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "UIM_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto3" SID 5408 Position [615, 446, 710, 464] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "UIM_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto4" SID 5409 Position [615, 566, 710, 584] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "PUM_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto5" SID 5410 Position [615, 626, 710, 644] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "PUM_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto6" SID 5411 Position [615, 746, 710, 764] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "TST_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto7" SID 5412 Position [615, 806, 710, 824] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "TST_R_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto8" SID 5413 Position [150, 176, 245, 194] BackgroundColor "[0.600000, 0.760000, 1.000000]" GotoTag "GND_Y_DISP" TagVisibility "local" } Block { BlockType Goto Name "Goto9" SID 5414 Position [150, 116, 245, 134] BackgroundColor "[0.300000, 1.000000, 0.580000]" GotoTag "GND_R_DISP" TagVisibility "local" } Block { BlockType Mux Name "Mux1" SID 5415 Ports [30, 1] Position [385, 16, 390, 924] BackgroundColor "black" ShowName off Inputs "30" } Block { BlockType Reference Name "QUAD" SID 5416 Description "FlexTf: ifoParams.act.quadModel.frd" Ports [1, 1] Position [420, 452, 555, 488] BackgroundColor "[0.505504, 0.250861, 1.000000]" AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.act.quadModel.ss" IC "[]" } Block { BlockType Outport Name "TOP_L_Disp [m]" SID 5417 Position [835, 118, 865, 132] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_T_Disp [m]" SID 5418 Position [835, 148, 865, 162] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_V_Disp [m]" SID 5419 Position [835, 178, 865, 192] BackgroundColor "orange" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_R_Disp [rad]" SID 5420 Position [835, 208, 865, 222] BackgroundColor "orange" Port "4" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_P_Disp [rad]" SID 5421 Position [835, 238, 865, 252] BackgroundColor "orange" Port "5" IconDisplay "Port number" } Block { BlockType Outport Name "TOP_Y_Disp [rad]" SID 5422 Position [835, 268, 865, 282] BackgroundColor "orange" Port "6" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_L_Disp [m]" SID 5423 Position [835, 298, 865, 312] BackgroundColor "orange" Port "7" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_T_Disp [m]" SID 5424 Position [835, 328, 865, 342] BackgroundColor "orange" Port "8" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_V_Disp [m]" SID 5425 Position [835, 358, 865, 372] BackgroundColor "orange" Port "9" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_R_Disp [rad]" SID 5426 Position [835, 388, 865, 402] BackgroundColor "orange" Port "10" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_P_Disp [rad]" SID 5427 Position [835, 418, 865, 432] BackgroundColor "orange" Port "11" IconDisplay "Port number" } Block { BlockType Outport Name "UIM_Y_Disp [rad]" SID 5428 Position [835, 448, 865, 462] BackgroundColor "orange" Port "12" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_L_Disp [m]" SID 5429 Position [835, 478, 865, 492] BackgroundColor "orange" Port "13" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_T_Disp [m]" SID 5430 Position [835, 508, 865, 522] BackgroundColor "orange" Port "14" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_V_Disp [m]" SID 5431 Position [835, 538, 865, 552] BackgroundColor "orange" Port "15" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_R_Disp [rad]" SID 5432 Position [835, 568, 865, 582] BackgroundColor "orange" Port "16" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_P_Disp [rad]" SID 5433 Position [835, 598, 865, 612] BackgroundColor "orange" Port "17" IconDisplay "Port number" } Block { BlockType Outport Name "PUM_Y_Disp [rad]" SID 5434 Position [835, 628, 865, 642] BackgroundColor "orange" Port "18" IconDisplay "Port number" } Block { BlockType Outport Name "TST_L_Disp [m]" SID 5435 Position [835, 658, 865, 672] BackgroundColor "orange" Port "19" IconDisplay "Port number" } Block { BlockType Outport Name "TST_T_Disp [m]" SID 5436 Position [835, 688, 865, 702] BackgroundColor "orange" Port "20" IconDisplay "Port number" } Block { BlockType Outport Name "TST_V_Disp [m]" SID 5437 Position [835, 718, 865, 732] BackgroundColor "orange" Port "21" IconDisplay "Port number" } Block { BlockType Outport Name "TST_R_Disp [rad]" SID 5438 Position [835, 748, 865, 762] BackgroundColor "orange" Port "22" IconDisplay "Port number" } Block { BlockType Outport Name "TST_P_Disp [rad]" SID 5439 Position [835, 778, 865, 792] BackgroundColor "orange" Port "23" IconDisplay "Port number" } Block { BlockType Outport Name "TST_Y_Disp [rad]" SID 5440 Position [835, 808, 865, 822] BackgroundColor "orange" Port "24" IconDisplay "Port number" } Line { SrcBlock "QUAD" SrcPort 1 DstBlock "Demux" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "QUAD" DstPort 1 } Line { SrcBlock "GND_L_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "GND_T_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "GND_V_DISP_IN [m]" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Demux" SrcPort 1 DstBlock "TOP_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 2 DstBlock "TOP_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 3 DstBlock "TOP_V_Disp [m]" DstPort 1 } Line { SrcBlock "TOP_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 7 } Line { SrcBlock "TOP_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 8 } Line { SrcBlock "TOP_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 9 } Line { SrcBlock "Demux" SrcPort 7 DstBlock "UIM_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 8 DstBlock "UIM_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 9 DstBlock "UIM_V_Disp [m]" DstPort 1 } Line { SrcBlock "UIM_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 14 } Line { SrcBlock "UIM_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 15 } Line { SrcBlock "Demux" SrcPort 13 DstBlock "PUM_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 14 DstBlock "PUM_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 15 DstBlock "PUM_V_Disp [m]" DstPort 1 } Line { SrcBlock "PUM_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 19 } Line { SrcBlock "PUM_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 20 } Line { SrcBlock "PUM_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 21 } Line { SrcBlock "Demux" SrcPort 19 DstBlock "TST_L_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 20 DstBlock "TST_T_Disp [m]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 21 DstBlock "TST_V_Disp [m]" DstPort 1 } Line { SrcBlock "TST_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 25 } Line { SrcBlock "TST_T_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 26 } Line { SrcBlock "TST_V_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 27 } Line { SrcBlock "Demux" SrcPort 4 DstBlock "Goto" DstPort 1 } Line { SrcBlock "From" SrcPort 1 DstBlock "TOP_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 6 DstBlock "Goto1" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "TOP_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 5 DstBlock "TOP_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 10 DstBlock "Goto2" DstPort 1 } Line { SrcBlock "Demux" SrcPort 11 DstBlock "UIM_P_Disp [rad]" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "UIM_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 12 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 DstBlock "UIM_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 16 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "From5" SrcPort 1 DstBlock "PUM_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 17 DstBlock "PUM_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 18 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "PUM_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "TST_R_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 22 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Demux" SrcPort 23 DstBlock "TST_P_Disp [rad]" DstPort 1 } Line { SrcBlock "Demux" SrcPort 24 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "TST_Y_Disp [rad]" DstPort 1 } Line { SrcBlock "UIM_L_DRIVE_IN [N]" SrcPort 1 DstBlock "Mux1" DstPort 13 } Line { SrcBlock "GND_R_DISP_IN [rad]" SrcPort 1 DstBlock "Goto9" DstPort 1 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Mux1" DstPort 4 } Line { SrcBlock "GND_P_DISP_IN [rad]" SrcPort 1 DstBlock "Mux1" DstPort 5 } Line { SrcBlock "GND_Y_DISP_IN [rad]" SrcPort 1 DstBlock "Goto8" DstPort 1 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Mux1" DstPort 6 } Line { SrcBlock "TOP_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto11" DstPort 1 } Line { SrcBlock "TOP_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 11 } Line { SrcBlock "TOP_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto10" DstPort 1 } Line { SrcBlock "From10" SrcPort 1 DstBlock "Mux1" DstPort 10 } Line { SrcBlock "From11" SrcPort 1 DstBlock "Mux1" DstPort 12 } Line { SrcBlock "UIM_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto13" DstPort 1 } Line { SrcBlock "UIM_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto12" DstPort 1 } Line { SrcBlock "PUM_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto15" DstPort 1 } Line { SrcBlock "PUM_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto14" DstPort 1 } Line { SrcBlock "TST_R_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto17" DstPort 1 } Line { SrcBlock "TST_Y_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Goto16" DstPort 1 } Line { SrcBlock "From12" SrcPort 1 DstBlock "Mux1" DstPort 16 } Line { SrcBlock "UIM_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 17 } Line { SrcBlock "From13" SrcPort 1 DstBlock "Mux1" DstPort 18 } Line { SrcBlock "From14" SrcPort 1 DstBlock "Mux1" DstPort 22 } Line { SrcBlock "PUM_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 23 } Line { SrcBlock "From15" SrcPort 1 DstBlock "Mux1" DstPort 24 } Line { SrcBlock "From16" SrcPort 1 DstBlock "Mux1" DstPort 28 } Line { SrcBlock "TST_P_DRIVE_IN [N.m]" SrcPort 1 DstBlock "Mux1" DstPort 29 } Line { SrcBlock "From17" SrcPort 1 DstBlock "Mux1" DstPort 30 } Annotation { Name "Mark Barton's Models have their DOFs in \nL T V Y P R order, where as Jeff Kissel's control \nsystems ha" "ve their DOFs in L T V R P Y order.\nHence the R and Y switcheroo seen in here." Position [524, 56] BackgroundColor "yellow" } } } Block { BlockType Reference Name "SqueezedFilmDamping" SID 5620 Tag "NbNoiseSource" Ports [0, 1] Position [487, 840, 503, 865] BlockRotation 270 BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Squeezed Film Damping'" asd "ifoParams.darmNb.squeezedFilmDamping" } Block { BlockType Sum Name "Sum1" SID 5621 Ports [2, 1] Position [485, 785, 505, 805] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5014 Ports [2, 1] Position [655, 220, 675, 240] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Terminator Name "Terminator" SID 5015 Position [1055, 274, 1075, 286] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator1" SID 5016 Position [1055, 304, 1075, 316] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator10" SID 5017 Position [1055, 574, 1075, 586] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator11" SID 5018 Position [1055, 604, 1075, 616] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator2" SID 5019 Position [1055, 334, 1075, 346] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator3" SID 5020 Position [1055, 364, 1075, 376] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator4" SID 5021 Position [1055, 394, 1075, 406] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator5" SID 5022 Position [1055, 424, 1075, 436] BackgroundColor "green" ShowName off } Block { BlockType Terminator Name "Terminator6" SID 5023 Position [1055, 454, 1075, 466] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator7" SID 5024 Position [1055, 484, 1075, 496] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator8" SID 5025 Position [1055, 514, 1075, 526] BackgroundColor "red" ShowName off } Block { BlockType Terminator Name "Terminator9" SID 5026 Position [1055, 544, 1075, 556] BackgroundColor "red" ShowName off } Block { BlockType Outport Name "ETM_Displacement [m]" SID 5027 Position [1265, 708, 1295, 722] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "QUAD" SrcPort 1 Points [85, 0; 0, -45; -820, 0; 0, 175] DstBlock "Damping Loops" DstPort 1 } Line { Labels [4, 0] SrcBlock "QUAD" SrcPort 2 Points [90, 0; 0, -80; -830, 0; 0, 205] DstBlock "Damping Loops" DstPort 2 } Line { SrcBlock "QUAD" SrcPort 3 Points [95, 0; 0, -115; -840, 0; 0, 235] DstBlock "Damping Loops" DstPort 3 } Line { SrcBlock "QUAD" SrcPort 4 Points [100, 0; 0, -150; -850, 0; 0, 265] DstBlock "Damping Loops" DstPort 4 } Line { SrcBlock "QUAD" SrcPort 5 Points [105, 0; 0, -185; -860, 0; 0, 295] DstBlock "Damping Loops" DstPort 5 } Line { SrcBlock "QUAD" SrcPort 6 Points [110, 0; 0, -220; -870, 0; 0, 325] DstBlock "Damping Loops" DstPort 6 } Line { SrcBlock "QUAD" SrcPort 7 DstBlock "Terminator" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 8 DstBlock "Terminator1" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 9 DstBlock "Terminator2" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 10 DstBlock "Terminator3" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 11 DstBlock "Terminator4" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 12 DstBlock "Terminator5" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 13 DstBlock "Terminator6" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 14 DstBlock "Terminator7" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 15 DstBlock "Terminator8" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 16 DstBlock "Terminator9" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 17 DstBlock "Terminator10" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 18 DstBlock "Terminator11" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 19 DstBlock "Cavity Misalignments" DstPort 1 } Line { SrcBlock "QUAD" SrcPort 20 DstBlock "Cavity Misalignments" DstPort 2 } Line { SrcBlock "QUAD" SrcPort 21 DstBlock "Cavity Misalignments" DstPort 3 } Line { SrcBlock "QUAD" SrcPort 22 DstBlock "Cavity Misalignments" DstPort 4 } Line { SrcBlock "QUAD" SrcPort 23 DstBlock "Cavity Misalignments" DstPort 5 } Line { SrcBlock "QUAD" SrcPort 24 DstBlock "Cavity Misalignments" DstPort 6 } Line { SrcBlock "Ground" SrcPort 1 DstBlock "QUAD" DstPort 14 } Line { SrcBlock "Ground1" SrcPort 1 DstBlock "QUAD" DstPort 15 } Line { SrcBlock "Ground4" SrcPort 1 DstBlock "QUAD" DstPort 18 } Line { SrcBlock "Ground3" SrcPort 1 DstBlock "QUAD" DstPort 17 } Line { SrcBlock "Ground2" SrcPort 1 DstBlock "QUAD" DstPort 16 } Line { SrcBlock "Ground5" SrcPort 1 DstBlock "QUAD" DstPort 20 } Line { SrcBlock "Ground6" SrcPort 1 DstBlock "QUAD" DstPort 21 } Line { SrcBlock "Ground7" SrcPort 1 DstBlock "QUAD" DstPort 22 } Line { SrcBlock "Ground8" SrcPort 1 DstBlock "QUAD" DstPort 23 } Line { SrcBlock "Ground9" SrcPort 1 DstBlock "QUAD" DstPort 24 } Line { SrcBlock "Ground10" SrcPort 1 DstBlock "QUAD" DstPort 26 } Line { SrcBlock "Ground11" SrcPort 1 DstBlock "QUAD" DstPort 27 } Line { SrcBlock "Ground12" SrcPort 1 DstBlock "QUAD" DstPort 28 } Line { SrcBlock "Ground13" SrcPort 1 DstBlock "QUAD" DstPort 29 } Line { SrcBlock "Ground14" SrcPort 1 DstBlock "QUAD" DstPort 30 } Line { SrcBlock "Cavity Misalignments" SrcPort 1 DstBlock "ETM_Displacement [m]" DstPort 1 } Line { SrcBlock "Hierarchy Loops" SrcPort 3 Points [225, 0; 0, -215] DstBlock "QUAD" DstPort 19 } Line { SrcBlock "Hierarchy Loops" SrcPort 2 Points [220, 0; 0, -315] DstBlock "QUAD" DstPort 13 } Line { SrcBlock "Damping Loops" SrcPort 2 DstBlock "QUAD" DstPort 8 } Line { SrcBlock "Damping Loops" SrcPort 3 DstBlock "QUAD" DstPort 9 } Line { SrcBlock "Damping Loops" SrcPort 4 DstBlock "QUAD" DstPort 10 } Line { SrcBlock "Damping Loops" SrcPort 5 DstBlock "QUAD" DstPort 11 } Line { SrcBlock "Damping Loops" SrcPort 6 DstBlock "QUAD" DstPort 12 } Line { SrcBlock "Damping Loops" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Hierarchy Loops" SrcPort 1 Points [215, 0] DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "QUAD" DstPort 7 } Line { SrcBlock "ETMY_CTRL_IN [m]" SrcPort 1 DstBlock "Hierarchy Loops" DstPort 1 } Line { SrcBlock "Ground20" SrcPort 1 DstBlock "QUAD" DstPort 1 } Line { SrcBlock "Ground15" SrcPort 1 DstBlock "QUAD" DstPort 2 } Line { SrcBlock "Ground16" SrcPort 1 DstBlock "QUAD" DstPort 3 } Line { SrcBlock "Ground17" SrcPort 1 DstBlock "QUAD" DstPort 4 } Line { SrcBlock "Ground18" SrcPort 1 DstBlock "QUAD" DstPort 5 } Line { SrcBlock "Ground19" SrcPort 1 DstBlock "QUAD" DstPort 6 } Line { SrcBlock "Hierarchy Loops" SrcPort 4 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "SqueezedFilmDamping" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Sum1" SrcPort 1 Points [180, 0; 0, -115] DstBlock "QUAD" DstPort 25 } } } Block { BlockType SubSystem Name "IFO2OPTIC" SID 879 Ports [1, 2] Position [145, 32, 265, 123] BackgroundColor "[0.520000, 1.000000, 0.400000]" NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "IFO2OPTIC" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "DARM_CTRL_IN [m]" SID 880 Position [55, 98, 85, 112] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Gain Name "Gain3" SID 885 Position [190, 17, 360, 93] Gain "ifoParams.act.darm2etmx" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 886 Position [190, 142, 355, 218] Gain "ifoParams.act.darm2etmy" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "ETMX_CTRL_OUT [m]" SID 888 Position [405, 48, 435, 62] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "ETMY_CTRL_OUT [m]" SID 889 Position [405, 173, 435, 187] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "DARM_CTRL_IN [m]" SrcPort 1 Points [50, 0] Branch { Points [0, -50] DstBlock "Gain3" DstPort 1 } Branch { Points [0, 75] DstBlock "Gain4" DstPort 1 } } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "ETMX_CTRL_OUT [m]" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "ETMY_CTRL_OUT [m]" DstPort 1 } } } Block { BlockType Sum Name "Subtract" SID 5296 Ports [2, 1] Position [570, 33, 600, 122] Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "IFO_DISP_OUT [m]" SID 5295 Position [660, 73, 690, 87] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "IFO2OPTIC" SrcPort 1 DstBlock "ETMX" DstPort 1 } Line { SrcBlock "IFO2OPTIC" SrcPort 2 DstBlock "ETMY" DstPort 1 } Line { SrcBlock "ETMX" SrcPort 1 DstBlock "Subtract" DstPort 1 } Line { SrcBlock "ETMY" SrcPort 1 DstBlock "Subtract" DstPort 2 } Line { SrcBlock "DARM_CTRL_IN [m]" SrcPort 1 DstBlock "IFO2OPTIC" DstPort 1 } Line { SrcBlock "Subtract" SrcPort 1 DstBlock "IFO_DISP_OUT [m]" DstPort 1 } } } Block { BlockType SubSystem Name "DARM" SID 3679 Ports [1, 1] Position [195, 282, 385, 348] BlockMirror on BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DARM" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "DARM_DISP_OUT [m]" SID 3680 Position [960, 43, 990, 57] BlockMirror on BackgroundColor "yellow" NamePlacement "alternate" IconDisplay "Port number" } Block { BlockType Reference Name "FM1" SID 3681 Description "FlexTf: ifoParams.dig.darm(1).frd" Ports [1, 1] Position [760, 25, 840, 75] BlockMirror on NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(1).ss" IC "[]" } Block { BlockType Reference Name "FM10" SID 3702 Ports [1, 1] Position [335, 115, 415, 165] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(10).ss" IC "[]" } Block { BlockType Reference Name "FM2" SID 3694 Description "FlexTf: ifoParams.dig.darm(2).frd" Ports [1, 1] Position [650, 25, 730, 75] BlockMirror on NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(2).ss" IC "[]" } Block { BlockType Reference Name "FM3" SID 3695 Ports [1, 1] Position [545, 25, 625, 75] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(3).ss" IC "[]" } Block { BlockType Reference Name "FM4" SID 3696 Ports [1, 1] Position [440, 25, 520, 75] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(4).ss" IC "[]" } Block { BlockType Reference Name "FM5" SID 3697 Ports [1, 1] Position [335, 25, 415, 75] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(5).ss" IC "[]" } Block { BlockType Reference Name "FM6" SID 3698 Ports [1, 1] Position [750, 115, 830, 165] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(6).ss" IC "[]" } Block { BlockType Reference Name "FM7" SID 3699 Ports [1, 1] Position [650, 115, 730, 165] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(7).ss" IC "[]" } Block { BlockType Reference Name "FM8" SID 3700 Ports [1, 1] Position [545, 115, 625, 165] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(8).ss" IC "[]" } Block { BlockType Reference Name "FM9" SID 3701 Ports [1, 1] Position [440, 115, 520, 165] BlockMirror on NamePlacement "alternate" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.dig.darm(9).ss" IC "[]" } Block { BlockType Gain Name "Gain2" SID 3692 Position [140, 102, 300, 178] BlockMirror on NamePlacement "alternate" ShowName off Gain "ifoParams.dig.darmGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "DARM_CTRL_OUT [m]" SID 3693 Position [55, 133, 85, 147] BlockMirror on BackgroundColor "orange" NamePlacement "alternate" IconDisplay "Port number" } Line { SrcBlock "FM1" SrcPort 1 DstBlock "FM2" DstPort 1 } Line { SrcBlock "FM2" SrcPort 1 DstBlock "FM3" DstPort 1 } Line { SrcBlock "FM3" SrcPort 1 DstBlock "FM4" DstPort 1 } Line { SrcBlock "FM4" SrcPort 1 DstBlock "FM5" DstPort 1 } Line { SrcBlock "FM6" SrcPort 1 DstBlock "FM7" DstPort 1 } Line { SrcBlock "FM7" SrcPort 1 DstBlock "FM8" DstPort 1 } Line { SrcBlock "FM8" SrcPort 1 DstBlock "FM9" DstPort 1 } Line { SrcBlock "FM9" SrcPort 1 DstBlock "FM10" DstPort 1 } Line { SrcBlock "DARM_DISP_OUT [m]" SrcPort 1 DstBlock "FM1" DstPort 1 } Line { SrcBlock "FM10" SrcPort 1 DstBlock "Gain2" DstPort 1 } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "DARM_CTRL_OUT [m]" DstPort 1 } Line { SrcBlock "FM5" SrcPort 1 Points [0, 45; 515, 0] DstBlock "FM6" DstPort 1 } } } Block { BlockType Reference Name "DarmSensor" SID 5528 Tag "NbNoiseSink" Ports [1, 1] Position [545, 307, 570, 323] BlockMirror on BackgroundColor "[1.000000, 0.501961, 0.000000]" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSink" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" dof "'DARM'" } Block { BlockType SubSystem Name "Displacement Noises" SID 5695 Ports [0, 1] Position [382, 25, 408, 65] BlockRotation 270 BlockMirror on BackgroundColor "orange" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Displacement Noises" Location [422, 80, 1229, 952] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Reference Name "DarmMeters" SID 5683 Tag "NbNoiseCal" Ports [0, 1] Position [40, 77, 65, 93] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseCal" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" dof "'DARM'" unit "'displacement [m/rtHz]'" } Block { BlockType Reference Name "ScatteredLightRing" SID 5698 Tag "NbNoiseSource" Ports [0, 1] Position [40, 217, 65, 233] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Scattered Light Ring'" asd "ifoParams.darmNb.scatteredLightRing" } Block { BlockType Sum Name "Sum2" SID 5697 Ports [2, 1] Position [140, 16, 160, 294] ShowName off InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out [m]" SID 5696 Position [235, 148, 265, 162] IconDisplay "Port number" } Line { SrcBlock "DarmMeters" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Out [m]" DstPort 1 } Line { SrcBlock "ScatteredLightRing" SrcPort 1 DstBlock "Sum2" DstPort 2 } } } Block { BlockType SubSystem Name "Sensing Function" SID 1790 Ports [1, 1] Position [455, 98, 645, 162] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sensing Function" Location [414, 24, 1237, 947] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "IFO_DISP_IN [m]" SID 1797 Position [35, 108, 65, 122] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType SubSystem Name "ADC" SID 1826 Ports [2, 2] Position [715, 211, 820, 289] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ADC" Location [414, 24, 1237, 947] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [V]" SID 1827 Position [110, 73, 140, 87] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [V]" SID 1828 Position [110, 168, 140, 182] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "AdcPd1" SID 5703 Tag "NbNoiseSource" Ports [0, 1] Position [162, 15, 178, 40] BlockRotation 270 BlockMirror on BackgroundColor "orange" NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'ADC'" asd "ifoParams.darmNb.adc" } Block { BlockType Reference Name "AdcPd2" SID 5707 Tag "NbNoiseSource" Ports [0, 1] Position [162, 220, 178, 245] BlockRotation 270 BackgroundColor "orange" NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'ADC'" asd "ifoParams.darmNb.adc" } Block { BlockType Gain Name "Gain1" SID 1829 Position [200, 149, 375, 201] Gain "ifoParams.sens.adcGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 1830 Position [200, 54, 370, 106] Gain "ifoParams.sens.adcGain" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5704 Ports [2, 1] Position [160, 70, 180, 90] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum3" SID 5708 Ports [2, 1] Position [160, 165, 180, 185] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "PD1_OUT [ct]" SID 1831 Position [430, 73, 460, 87] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [ct]" SID 1832 Position [430, 168, 460, 182] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "AdcPd1" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "PD1_IN1 [V]" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "PD1_OUT [ct]" DstPort 1 } Line { SrcBlock "AdcPd2" SrcPort 1 DstBlock "Sum3" DstPort 2 } Line { SrcBlock "PD2_IN [V]" SrcPort 1 DstBlock "Sum3" DstPort 1 } Line { SrcBlock "Sum3" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "PD2_OUT [ct]" DstPort 1 } Annotation { Name "ifoParams.sens.adcGain\n[ct/V]" Position [285, 25] } } } Block { BlockType SubSystem Name "DCPD Analog Electronics" SID 2247 Ports [2, 2] Position [530, 210, 695, 290] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DCPD Analog Electronics" Location [422, 24, 1229, 911] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN [W]" SID 2249 Position [25, 78, 55, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [W]" SID 2251 Position [25, 118, 55, 132] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Anti-Aliasing Chassis" SID 1861 Ports [2, 2] Position [490, 66, 595, 144] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Anti-Aliasing Chassis" Location [655, 95, 1168, 919] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [V]" SID 1862 Position [110, 38, 140, 52] IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [V]" SID 1863 Position [110, 98, 140, 112] Port "2" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 1864 Position [165, 85, 215, 125] ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 1865 Position [165, 25, 215, 65] ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "PD1_OUT [V]" SID 1866 Position [240, 38, 270, 52] IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [V]" SID 1867 Position [240, 98, 270, 112] Port "2" IconDisplay "Port number" } Line { SrcBlock "PD1_IN1 [V]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "PD1_OUT [V]" DstPort 1 } Line { SrcBlock "PD2_IN [V]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "PD2_OUT [V]" DstPort 1 } } } Block { BlockType Reference Name "Aspd1Dark" SID 5691 Tag "NbNoiseSource" Ports [0, 1] Position [202, 20, 218, 45] BlockRotation 270 BlockMirror on BackgroundColor "orange" NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'ASPD Dark'" asd "ifoParams.darmNb.aspdDark" } Block { BlockType Reference Name "Aspd2Dark" SID 5692 Tag "NbNoiseSource" Ports [0, 1] Position [202, 165, 218, 190] BlockRotation 270 BackgroundColor "orange" NamePlacement "alternate" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'ASPD Dark'" asd "ifoParams.darmNb.aspdDark" } Block { BlockType SubSystem Name "PD Quantum Efficiency" SID 1807 Ports [2, 2] Position [75, 66, 180, 144] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PD Quantum Efficiency" Location [446, 46, 1205, 825] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [W]" SID 1808 Position [60, 78, 90, 92] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [W]" SID 1810 Position [60, 183, 90, 197] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Gain Name "Gain1" SID 4541 Position [170, 147, 380, 233] Gain "ifoParams.sens.pdQuantumEfficiency" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain3" SID 1798 Position [170, 42, 380, 128] Gain "ifoParams.sens.pdQuantumEfficiency" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "PD1_OUT [A]" SID 1809 Position [430, 78, 460, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [A]" SID 1811 Position [430, 183, 460, 197] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "PD1_IN1 [W]" SrcPort 1 DstBlock "Gain3" DstPort 1 } Line { SrcBlock "Gain3" SrcPort 1 DstBlock "PD1_OUT [A]" DstPort 1 } Line { SrcBlock "PD2_IN [W]" SrcPort 1 DstBlock "Gain1" DstPort 1 } Line { SrcBlock "Gain1" SrcPort 1 DstBlock "PD2_OUT [A]" DstPort 1 } } } Block { BlockType SubSystem Name "Preamps" SID 1812 Ports [2, 2] Position [240, 66, 345, 144] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Preamps" Location [446, 46, 1205, 825] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [A]" SID 1813 Position [110, 38, 140, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [A]" SID 1814 Position [110, 128, 140, 142] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Preamp_PD1" SID 4542 Ports [1, 1] Position [180, 24, 270, 66] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Preamp_PD1" Location [210, 234, 1334, 1285] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [A]" SID 4543 Position [15, 93, 45, 107] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transimpedance\nDe-energized" SID 4584 Position [135, 188, 200, 232] Gain "100" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "DC Transimpedance\nEnergized" SID 4544 Position [135, 78, 200, 122] Gain "400" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch" SID 4585 Position [295, 74, 340, 236] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "Whitening_1 \n[7.3:79]" SID 4551 Position [410, 126, 500, 184] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType ZeroPole Name "Whitening_2\n[7.3:79]" SID 4583 Position [555, 126, 645, 184] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType Constant Name "ifoParams.sens.preamp.zswitch.state" SID 4548 Position [190, 144, 225, 166] Value "ifoParams.sens.preamp.zswitch.state" } Block { BlockType Outport Name "Out [V]" SID 4549 Position [705, 148, 735, 162] IconDisplay "Port number" } Line { SrcBlock "In [A]" SrcPort 1 Points [65, 0] Branch { DstBlock "DC Transimpedance\nEnergized" DstPort 1 } Branch { Points [0, 110] DstBlock "DC Transimpedance\nDe-energized" DstPort 1 } } Line { SrcBlock "Whitening_2\n[7.3:79]" SrcPort 1 DstBlock "Out [V]" DstPort 1 } Line { SrcBlock "DC Transimpedance\nEnergized" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Whitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Whitening_2\n[7.3:79]" DstPort 1 } Line { SrcBlock "ifoParams.sens.preamp.zswitch.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "DC Transimpedance\nDe-energized" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 DstBlock "Whitening_1 \n[7.3:79]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [204, 317] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD060572-v1 (or B3)." Position [417, 35] } } } Block { BlockType SubSystem Name "Preamp_PD2" SID 4586 Ports [1, 1] Position [180, 114, 270, 156] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Preamp_PD2" Location [553, 144, 1677, 1195] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [A]" SID 4587 Position [15, 93, 45, 107] IconDisplay "Port number" } Block { BlockType Gain Name "DC Transimpedance\nDe-energized" SID 4588 Position [135, 188, 200, 232] Gain "100" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "DC Transimpedance\nEnergized" SID 4589 Position [135, 78, 200, 122] Gain "400" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch" SID 4590 Position [295, 74, 340, 236] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "Whitening_1 \n[7.3:79]" SID 4591 Position [410, 126, 500, 184] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType ZeroPole Name "Whitening_2\n[7.3:79]" SID 4592 Position [555, 126, 645, 184] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType Constant Name "ifoParams.sens.preamp.zswitch.state" SID 4593 Position [190, 144, 225, 166] Value "ifoParams.sens.preamp.zswitch.state" } Block { BlockType Outport Name "Out [V]" SID 4594 Position [705, 148, 735, 162] IconDisplay "Port number" } Line { SrcBlock "In [A]" SrcPort 1 Points [65, 0] Branch { DstBlock "DC Transimpedance\nEnergized" DstPort 1 } Branch { Points [0, 110] DstBlock "DC Transimpedance\nDe-energized" DstPort 1 } } Line { SrcBlock "Whitening_2\n[7.3:79]" SrcPort 1 DstBlock "Out [V]" DstPort 1 } Line { SrcBlock "DC Transimpedance\nEnergized" SrcPort 1 DstBlock "Switch" DstPort 1 } Line { SrcBlock "Whitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Whitening_2\n[7.3:79]" DstPort 1 } Line { SrcBlock "ifoParams.sens.preamp.zswitch.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "DC Transimpedance\nDe-energized" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 DstBlock "Whitening_1 \n[7.3:79]" DstPort 1 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [204, 317] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD060572-v1 (or B3)." Position [417, 35] } } } Block { BlockType Outport Name "PD1_OUT [V]" SID 1817 Position [320, 38, 350, 52] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [V]" SID 1818 Position [320, 128, 350, 142] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "PD1_IN1 [A]" SrcPort 1 DstBlock "Preamp_PD1" DstPort 1 } Line { SrcBlock "Preamp_PD1" SrcPort 1 DstBlock "PD1_OUT [V]" DstPort 1 } Line { SrcBlock "PD2_IN [A]" SrcPort 1 DstBlock "Preamp_PD2" DstPort 1 } Line { SrcBlock "Preamp_PD2" SrcPort 1 DstBlock "PD2_OUT [V]" DstPort 1 } } } Block { BlockType Sum Name "Sum1" SID 5694 Ports [2, 1] Position [200, 115, 220, 135] ShowName off IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 5693 Ports [2, 1] Position [200, 75, 220, 95] ShowName off IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType SubSystem Name "Whitening Chassis" SID 1819 Ports [2, 2] Position [365, 66, 470, 144] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Whitening Chassis" Location [12, 197, 598, 1055] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [V]" SID 1820 Position [110, 38, 140, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [V]" SID 1821 Position [110, 98, 140, 112] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "Whitening_PD1" SID 4563 Ports [1, 1] Position [170, 24, 260, 66] BackgroundColor "[1.000000, 0.949853, 0.429324]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Whitening_PD1" Location [49, 176, 1173, 1227] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [V]" SID 4564 Position [25, 93, 55, 107] IconDisplay "Port number" } Block { BlockType Gain Name "DC Gain" SID 4565 Position [80, 78, 145, 122] Gain "0.5" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch" SID 4566 Position [390, 74, 435, 236] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 4567 Position [720, 127, 765, 293] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "Whitening_1 \n[7.3:79]" SID 4568 Position [195, 181, 285, 239] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType ZeroPole Name "Whitening_2\n[24:260]" SID 4569 Position [570, 237, 660, 293] BackgroundColor "green" Zeros "-2*pi*[24]" Poles "-2*pi*[260]" Gain "[260/24]" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage1.state" SID 4570 Position [275, 144, 310, 166] Value "ifoParams.sens.whitening.stage1.state" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage2.state" SID 4571 Position [600, 199, 635, 221] Value "ifoParams.sens.whitening.stage2.state" } Block { BlockType Outport Name "Out [V]" SID 4572 Position [840, 203, 870, 217] IconDisplay "Port number" } Line { SrcBlock "DC Gain" SrcPort 1 Points [20, 0] Branch { DstBlock "Switch" DstPort 1 } Branch { Points [0, 110] DstBlock "Whitening_1 \n[7.3:79]" DstPort 1 } } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Gain" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage1.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Whitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "Whitening_2\n[24:260]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 Points [65, 0] Branch { DstBlock "Switch1" DstPort 1 } Branch { Points [0, 110] DstBlock "Whitening_2\n[24:260]" DstPort 1 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [V]" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage2.state" SrcPort 1 DstBlock "Switch1" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [104, 277] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD070281-v1" Position [487, 45] } } } Block { BlockType SubSystem Name "Whitening_PD2" SID 5278 Ports [1, 1] Position [170, 84, 260, 126] BackgroundColor "[1.000000, 0.949853, 0.429324]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Whitening_PD2" Location [49, 45, 1173, 1096] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "110" Block { BlockType Inport Name "In [V]" SID 5279 Position [25, 93, 55, 107] IconDisplay "Port number" } Block { BlockType Gain Name "DC Gain" SID 5280 Position [80, 78, 145, 122] Gain "0.5" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch" SID 5281 Position [390, 74, 435, 236] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5282 Position [720, 127, 765, 293] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType ZeroPole Name "Whitening_1 \n[7.3:79]" SID 5283 Position [195, 181, 285, 239] BackgroundColor "green" Zeros "-2*pi*[7.3]" Poles "-2*pi*[79]" Gain "[79/7.3]" } Block { BlockType ZeroPole Name "Whitening_2\n[24:260]" SID 5284 Position [570, 237, 660, 293] BackgroundColor "green" Zeros "-2*pi*[24]" Poles "-2*pi*[260]" Gain "[260/24]" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage1.state" SID 5285 Position [275, 144, 310, 166] Value "ifoParams.sens.whitening.stage1.state" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage2.state" SID 5286 Position [600, 199, 635, 221] Value "ifoParams.sens.whitening.stage2.state" } Block { BlockType Outport Name "Out [V]" SID 5287 Position [840, 203, 870, 217] IconDisplay "Port number" } Line { SrcBlock "DC Gain" SrcPort 1 Points [20, 0] Branch { DstBlock "Switch" DstPort 1 } Branch { Points [0, 110] DstBlock "Whitening_1 \n[7.3:79]" DstPort 1 } } Line { SrcBlock "In [V]" SrcPort 1 DstBlock "DC Gain" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage1.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "Whitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "Whitening_2\n[24:260]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 Points [65, 0] Branch { DstBlock "Switch1" DstPort 1 } Branch { Points [0, 110] DstBlock "Whitening_2\n[24:260]" DstPort 1 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [V]" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage2.state" SrcPort 1 DstBlock "Switch1" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [104, 277] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD070281-v1" Position [487, 45] } } } Block { BlockType Outport Name "PD1_OUT [V]" SID 1824 Position [290, 38, 320, 52] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [V]" SID 1825 Position [290, 98, 320, 112] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "PD1_IN1 [V]" SrcPort 1 DstBlock "Whitening_PD1" DstPort 1 } Line { SrcBlock "Whitening_PD1" SrcPort 1 DstBlock "PD1_OUT [V]" DstPort 1 } Line { SrcBlock "PD2_IN [V]" SrcPort 1 DstBlock "Whitening_PD2" DstPort 1 } Line { SrcBlock "Whitening_PD2" SrcPort 1 DstBlock "PD2_OUT [V]" DstPort 1 } } } Block { BlockType Outport Name "PD1_OUT [V]" SID 2248 Position [620, 78, 650, 92] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [V]" SID 2250 Position [620, 118, 650, 132] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "Preamps" SrcPort 1 DstBlock "Whitening Chassis" DstPort 1 } Line { SrcBlock "Preamps" SrcPort 2 DstBlock "Whitening Chassis" DstPort 2 } Line { SrcBlock "Whitening Chassis" SrcPort 1 DstBlock "Anti-Aliasing Chassis" DstPort 1 } Line { SrcBlock "Whitening Chassis" SrcPort 2 DstBlock "Anti-Aliasing Chassis" DstPort 2 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 1 DstBlock "PD1_OUT [V]" DstPort 1 } Line { SrcBlock "PD1_IN [W]" SrcPort 1 DstBlock "PD Quantum Efficiency" DstPort 1 } Line { SrcBlock "Anti-Aliasing Chassis" SrcPort 2 DstBlock "PD2_OUT [V]" DstPort 1 } Line { SrcBlock "PD2_IN [W]" SrcPort 1 DstBlock "PD Quantum Efficiency" DstPort 2 } Line { SrcBlock "PD Quantum Efficiency" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "PD Quantum Efficiency" SrcPort 2 DstBlock "Sum1" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Preamps" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "Preamps" DstPort 2 } Line { SrcBlock "Aspd1Dark" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Aspd2Dark" SrcPort 1 DstBlock "Sum1" DstPort 2 } } } Block { BlockType SubSystem Name "DCPD Signal Conditioning" SID 2254 Ports [2, 2] Position [840, 210, 1000, 290] BackgroundColor "[0.750000, 0.750000, 0.750000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "DCPD Signal Conditioning" Location [446, 46, 1205, 825] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN [ct]" SID 2255 Position [25, 38, 55, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [ct]" SID 2257 Position [25, 78, 55, 92] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "64k to 16k\nDownsampling Filter" SID 2240 Ports [2, 2] Position [110, 26, 215, 104] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "64k to 16k\nDownsampling Filter" Location [590, 117, 1157, 1014] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PDq_IN [ct]" SID 2241 Position [60, 38, 90, 52] IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [ct]" SID 2242 Position [60, 148, 90, 162] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "cdsDownSamplingFilter_64kto16k_PD1" SID 2252 Ports [1, 1] Position [185, 26, 260, 64] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.sens.cdsDownsamplingFilter_64kto16k.ss" IC "[]" } Block { BlockType Reference Name "cdsDownSamplingFilter_64kto16k_PD2" SID 5293 Ports [1, 1] Position [185, 136, 260, 174] LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.sens.cdsDownsamplingFilter_64kto16k.ss" IC "[]" } Block { BlockType Outport Name "PD1_OUT [ct]" SID 2245 Position [355, 38, 385, 52] IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [ct]" SID 2246 Position [350, 148, 380, 162] Port "2" IconDisplay "Port number" } Line { SrcBlock "PDq_IN [ct]" SrcPort 1 DstBlock "cdsDownSamplingFilter_64kto16k_PD1" DstPort 1 } Line { SrcBlock "cdsDownSamplingFilter_64kto16k_PD1" SrcPort 1 DstBlock "PD1_OUT [ct]" DstPort 1 } Line { SrcBlock "PD2_IN [ct]" SrcPort 1 DstBlock "cdsDownSamplingFilter_64kto16k_PD2" DstPort 1 } Line { SrcBlock "cdsDownSamplingFilter_64kto16k_PD2" SrcPort 1 DstBlock "PD2_OUT [ct]" DstPort 1 } } } Block { BlockType SubSystem Name "ISCINF" SID 1833 Ports [2, 2] Position [260, 26, 365, 104] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "ISCINF" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN [ct]" SID 1834 Position [40, 38, 70, 52] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [ct]" SID 1835 Position [40, 148, 70, 162] BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType SubSystem Name "AntiPreamps_PD1" SID 5318 Ports [1, 1] Position [120, 22, 200, 68] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntiPreamps_PD1" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5319 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType ZeroPole Name "AntiWhitening_1 \n[7.3:79]" SID 5316 Position [80, 28, 175, 82] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType ZeroPole Name "AntiWhitening_2 \n[7.3:79]" SID 5317 Position [205, 28, 300, 82] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType Outport Name "Out [ct]" SID 5320 Position [325, 48, 355, 62] IconDisplay "Port number" } Line { SrcBlock "AntiWhitening_1 \n[7.3:79]" SrcPort 1 DstBlock "AntiWhitening_2 \n[7.3:79]" DstPort 1 } Line { SrcBlock "In [ct]" SrcPort 1 DstBlock "AntiWhitening_1 \n[7.3:79]" DstPort 1 } Line { SrcBlock "AntiWhitening_2 \n[7.3:79]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } } } Block { BlockType SubSystem Name "AntiPreamps_PD2" SID 5321 Ports [1, 1] Position [120, 132, 200, 178] BackgroundColor "[0.000000, 0.400000, 1.000000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntiPreamps_PD2" Location [813, 194, 1329, 948] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5322 Position [25, 48, 55, 62] IconDisplay "Port number" } Block { BlockType ZeroPole Name "AntiWhitening_1 \n[7.3:79]" SID 5323 Position [80, 28, 175, 82] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType ZeroPole Name "AntiWhitening_2 \n[7.3:79]" SID 5324 Position [205, 28, 300, 82] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType Outport Name "Out [ct]" SID 5325 Position [325, 48, 355, 62] IconDisplay "Port number" } Line { SrcBlock "AntiWhitening_1 \n[7.3:79]" SrcPort 1 DstBlock "AntiWhitening_2 \n[7.3:79]" DstPort 1 } Line { SrcBlock "In [ct]" SrcPort 1 DstBlock "AntiWhitening_1 \n[7.3:79]" DstPort 1 } Line { SrcBlock "AntiWhitening_2 \n[7.3:79]" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } } } Block { BlockType SubSystem Name "AntiWhitening_PD1" SID 5335 Ports [1, 1] Position [275, 22, 355, 68] BackgroundColor "[1.000000, 0.949752, 0.429000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntiWhitening_PD1" Location [159, 45, 918, 824] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5336 Position [25, 73, 55, 87] IconDisplay "Port number" } Block { BlockType ZeroPole Name "AntiWhitening_1 \n[7.3:79]" SID 5330 Position [195, 161, 295, 219] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType ZeroPole Name "AntiWhitening_2\n[24:260]" SID 5331 Position [570, 216, 680, 274] BackgroundColor "green" Zeros "-2*pi*[260]" Poles "-2*pi*[24]" Gain "[24/260]" } Block { BlockType Switch Name "Switch" SID 5328 Position [390, 54, 435, 216] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5329 Position [720, 107, 765, 273] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "ifoParams.sens.whitening.stage1.state" SID 5332 Position [275, 124, 310, 146] Value "ifoParams.sens.whitening.stage1.state" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage2.state" SID 5333 Position [600, 179, 635, 201] Value "ifoParams.sens.whitening.stage2.state" } Block { BlockType Outport Name "Out [ct]" SID 5337 Position [840, 183, 870, 197] IconDisplay "Port number" } Line { SrcBlock "In [ct]" SrcPort 1 Points [110, 0] Branch { DstBlock "Switch" DstPort 1 } Branch { Points [0, 110] DstBlock "AntiWhitening_1 \n[7.3:79]" DstPort 1 } } Line { SrcBlock "ifoParams.sens.whitening.stage1.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "AntiWhitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "AntiWhitening_2\n[24:260]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 Points [65, 0] Branch { DstBlock "Switch1" DstPort 1 } Branch { Points [0, 110] DstBlock "AntiWhitening_2\n[24:260]" DstPort 1 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage2.state" SrcPort 1 DstBlock "Switch1" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [104, 257] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD070281-v1" Position [487, 25] } } } Block { BlockType SubSystem Name "AntiWhitening_PD2" SID 5338 Ports [1, 1] Position [275, 132, 355, 178] BackgroundColor "[1.000000, 0.949752, 0.429000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "AntiWhitening_PD2" Location [432, 45, 1463, 994] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In [ct]" SID 5339 Position [25, 73, 55, 87] IconDisplay "Port number" } Block { BlockType ZeroPole Name "AntiWhitening_1 \n[7.3:79]" SID 5340 Position [195, 161, 295, 219] BackgroundColor "green" Zeros "-2*pi*[79]" Poles "-2*pi*[7.3]" Gain "[7.3/79]" } Block { BlockType ZeroPole Name "AntiWhitening_2\n[24:260]" SID 5341 Position [570, 216, 680, 274] BackgroundColor "green" Zeros "-2*pi*[260]" Poles "-2*pi*[24]" Gain "[24/260]" } Block { BlockType Switch Name "Switch" SID 5342 Position [390, 54, 435, 216] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Switch Name "Switch1" SID 5343 Position [720, 107, 765, 273] Threshold "0.5" InputSameDT off SaturateOnIntegerOverflow off } Block { BlockType Constant Name "ifoParams.sens.whitening.stage1.state" SID 5344 Position [275, 124, 310, 146] Value "ifoParams.sens.whitening.stage1.state" } Block { BlockType Constant Name "ifoParams.sens.whitening.stage2.state" SID 5345 Position [600, 179, 635, 201] Value "ifoParams.sens.whitening.stage2.state" } Block { BlockType Outport Name "Out [ct]" SID 5346 Position [840, 183, 870, 197] IconDisplay "Port number" } Line { SrcBlock "In [ct]" SrcPort 1 Points [110, 0] Branch { DstBlock "Switch" DstPort 1 } Branch { Points [0, 110] DstBlock "AntiWhitening_1 \n[7.3:79]" DstPort 1 } } Line { SrcBlock "ifoParams.sens.whitening.stage1.state" SrcPort 1 DstBlock "Switch" DstPort 2 } Line { SrcBlock "AntiWhitening_1 \n[7.3:79]" SrcPort 1 DstBlock "Switch" DstPort 3 } Line { SrcBlock "AntiWhitening_2\n[24:260]" SrcPort 1 DstBlock "Switch1" DstPort 3 } Line { SrcBlock "Switch" SrcPort 1 Points [65, 0] Branch { DstBlock "Switch1" DstPort 1 } Branch { Points [0, 110] DstBlock "AntiWhitening_2\n[24:260]" DstPort 1 } } Line { SrcBlock "Switch1" SrcPort 1 DstBlock "Out [ct]" DstPort 1 } Line { SrcBlock "ifoParams.sens.whitening.stage2.state" SrcPort 1 DstBlock "Switch1" DstPort 2 } Annotation { Name "Switches pass upper path if set to 1 (one), \nlower path if set to 0 (zero)" Position [104, 257] } Annotation { Name "Zeros and Poles Derived from Schematic \n(with more precision than the frequencies noted above the st" "ages)\nD070281-v1" Position [487, 25] } } } Block { BlockType Outport Name "PD1_OUT [m]" SID 1838 Position [440, 38, 470, 52] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [m]" SID 1839 Position [440, 148, 470, 162] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "PD1_IN [ct]" SrcPort 1 DstBlock "AntiPreamps_PD1" DstPort 1 } Line { SrcBlock "AntiWhitening_PD1" SrcPort 1 DstBlock "PD1_OUT [m]" DstPort 1 } Line { SrcBlock "PD2_IN [ct]" SrcPort 1 DstBlock "AntiPreamps_PD2" DstPort 1 } Line { SrcBlock "AntiWhitening_PD2" SrcPort 1 DstBlock "PD2_OUT [m]" DstPort 1 } Line { SrcBlock "AntiPreamps_PD1" SrcPort 1 DstBlock "AntiWhitening_PD1" DstPort 1 } Line { SrcBlock "AntiPreamps_PD2" SrcPort 1 DstBlock "AntiWhitening_PD2" DstPort 1 } } } Block { BlockType Outport Name "PD1_OUT [m]" SID 2256 Position [410, 38, 440, 52] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [m]" SID 2258 Position [410, 78, 440, 92] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "64k to 16k\nDownsampling Filter" SrcPort 1 DstBlock "ISCINF" DstPort 1 } Line { SrcBlock "64k to 16k\nDownsampling Filter" SrcPort 2 DstBlock "ISCINF" DstPort 2 } Line { SrcBlock "PD1_IN [ct]" SrcPort 1 DstBlock "64k to 16k\nDownsampling Filter" DstPort 1 } Line { SrcBlock "ISCINF" SrcPort 1 DstBlock "PD1_OUT [m]" DstPort 1 } Line { SrcBlock "PD2_IN [ct]" SrcPort 1 DstBlock "64k to 16k\nDownsampling Filter" DstPort 2 } Line { SrcBlock "ISCINF" SrcPort 2 DstBlock "PD2_OUT [m]" DstPort 1 } } } Block { BlockType SubSystem Name "IFO2PD" SID 1802 Ports [1, 2] Position [400, 211, 505, 289] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "IFO2PD" Location [446, 46, 1205, 825] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "IFO_OUT [W]" SID 1803 Position [30, 158, 60, 172] BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Gain Name "Gain2" SID 1800 Position [115, 99, 305, 141] Gain "ifoParams.sens.ifo2pd1" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Gain Name "Gain4" SID 1801 Position [115, 189, 305, 231] Gain "ifoParams.sens.ifo2pd2" ParameterDataTypeMode "Inherit via internal rule" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "PD1_OUT [W]" SID 1804 Position [405, 113, 435, 127] BackgroundColor "orange" IconDisplay "Port number" } Block { BlockType Outport Name "PD2_OUT [W]" SID 1806 Position [405, 203, 435, 217] BackgroundColor "orange" Port "2" IconDisplay "Port number" } Line { SrcBlock "IFO_OUT [W]" SrcPort 1 Points [25, 0] Branch { Points [0, -45] DstBlock "Gain2" DstPort 1 } Branch { Points [0, 45] DstBlock "Gain4" DstPort 1 } } Line { SrcBlock "Gain2" SrcPort 1 DstBlock "PD1_OUT [W]" DstPort 1 } Line { SrcBlock "Gain4" SrcPort 1 DstBlock "PD2_OUT [W]" DstPort 1 } } } Block { BlockType Reference Name "LaserAm" SID 5686 Tag "NbNoiseSource" Ports [0, 1] Position [180, 152, 205, 168] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Laser Intensity'" asd "ifoParams.darmNb.laserAm" } Block { BlockType Reference Name "LaserPm" SID 5687 Tag "NbNoiseSource" Ports [0, 1] Position [180, 197, 205, 213] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Laser Frequency'" asd "ifoParams.darmNb.laserPm" } Block { BlockType Reference Name "Mich" SID 5709 Tag "NbNoiseSource" Ports [0, 1] Position [180, 377, 205, 393] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'MICH Coupling'" asd "ifoParams.darmNb.mich" } Block { BlockType Reference Name "OscAm" SID 5688 Tag "NbNoiseSource" Ports [0, 1] Position [180, 242, 205, 258] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Oscillator Amplitude'" asd "ifoParams.darmNb.oscAm" } Block { BlockType Reference Name "OscPm" SID 5689 Tag "NbNoiseSource" Ports [0, 1] Position [180, 287, 205, 303] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Oscillator Phase'" asd "ifoParams.darmNb.oscPm" } Block { BlockType SubSystem Name "PD2IFO" SID 1840 Ports [2, 1] Position [1030, 211, 1135, 289] BackgroundColor "[0.520000, 1.000000, 0.400000]" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "PD2IFO" Location [446, 46, 1205, 825] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "PD1_IN1 [m]" SID 1841 Position [110, 53, 140, 67] IconDisplay "Port number" } Block { BlockType Inport Name "PD2_IN [m]" SID 1842 Position [110, 138, 140, 152] Port "2" IconDisplay "Port number" } Block { BlockType Sum Name "Sum2" SID 1850 Ports [2, 1] Position [205, 17, 225, 188] ShowName off InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "DARM_DISP_OUT [m]" SID 1845 Position [305, 98, 335, 112] IconDisplay "Port number" } Line { SrcBlock "PD1_IN1 [m]" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "DARM_DISP_OUT [m]" DstPort 1 } Line { SrcBlock "PD2_IN [m]" SrcPort 1 DstBlock "Sum2" DstPort 2 } } } Block { BlockType Reference Name "Quantum" SID 5690 Tag "NbNoiseSource" Ports [0, 1] Position [180, 332, 205, 348] BackgroundColor "orange" AttributesFormatString "%" LibraryVersion "1.21" SourceBlock "NbLibrary/NbNoiseSource" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" group "'Quantum'" asd "ifoParams.darmNb.quantum" } Block { BlockType Sum Name "Sum2" SID 5685 Ports [7, 1] Position [335, 98, 355, 402] ShowName off Inputs "+++++++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "ifoResponse" SID 5313 Description "FlexTf: ifoParams.sens.ifoResponse.frd" Ports [1, 1] Position [120, 108, 265, 122] AttributesFormatString "%" LibraryVersion "1.107" SourceBlock "cstblocks/LTI System" SourceType "LTI Block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" sys "ifoParams.sens.ifoResponse.ss" IC "[]" } Block { BlockType Outport Name "DARM_DISP_OUT [m]" SID 1854 Position [1190, 243, 1220, 257] BackgroundColor "orange" IconDisplay "Port number" } Line { SrcBlock "IFO2PD" SrcPort 1 DstBlock "DCPD Analog Electronics" DstPort 1 } Line { SrcBlock "IFO2PD" SrcPort 2 DstBlock "DCPD Analog Electronics" DstPort 2 } Line { SrcBlock "IFO_DISP_IN [m]" SrcPort 1 DstBlock "ifoResponse" DstPort 1 } Line { SrcBlock "DCPD Signal Conditioning" SrcPort 1 DstBlock "PD2IFO" DstPort 1 } Line { SrcBlock "DCPD Signal Conditioning" SrcPort 2 DstBlock "PD2IFO" DstPort 2 } Line { SrcBlock "PD2IFO" SrcPort 1 DstBlock "DARM_DISP_OUT [m]" DstPort 1 } Line { SrcBlock "DCPD Analog Electronics" SrcPort 1 DstBlock "ADC" DstPort 1 } Line { SrcBlock "DCPD Analog Electronics" SrcPort 2 DstBlock "ADC" DstPort 2 } Line { SrcBlock "ADC" SrcPort 1 DstBlock "DCPD Signal Conditioning" DstPort 1 } Line { SrcBlock "ADC" SrcPort 2 DstBlock "DCPD Signal Conditioning" DstPort 2 } Line { SrcBlock "ifoResponse" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "IFO2PD" DstPort 1 } Line { SrcBlock "LaserAm" SrcPort 1 DstBlock "Sum2" DstPort 2 } Line { SrcBlock "LaserPm" SrcPort 1 DstBlock "Sum2" DstPort 3 } Line { SrcBlock "OscAm" SrcPort 1 DstBlock "Sum2" DstPort 4 } Line { SrcBlock "OscPm" SrcPort 1 DstBlock "Sum2" DstPort 5 } Line { SrcBlock "Quantum" SrcPort 1 DstBlock "Sum2" DstPort 6 } Line { SrcBlock "Mich" SrcPort 1 DstBlock "Sum2" DstPort 7 } } } Block { BlockType Sum Name "Sum1" SID 1855 Ports [2, 1] Position [430, 295, 470, 335] BlockMirror on NamePlacement "alternate" ShowName off FontSize 24 IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" SID 1856 Ports [2, 1] Position [300, 110, 340, 150] ShowName off FontSize 24 IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum3" SID 2971 Ports [2, 1] Position [130, 295, 170, 335] BlockMirror on NamePlacement "alternate" ShowName off FontSize 24 IconShape "round" Inputs "|++" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum4" SID 5684 Ports [2, 1] Position [375, 110, 415, 150] ShowName off FontSize 24 IconShape "round" Inputs "++|" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "DARM_IN1 [m]" SID 1859 Position [493, 235, 507, 265] BlockRotation 270 BackgroundColor "yellow" IconDisplay "Port number" } Block { BlockType Outport Name "DARM_IN2 [m]" SID 1858 Position [403, 235, 417, 265] BlockRotation 270 BackgroundColor "yellow" Port "2" IconDisplay "Port number" } Block { BlockType Outport Name "DARM_CTRL [m]" SID 2261 Position [103, 235, 117, 265] BlockRotation 270 BackgroundColor "yellow" Port "3" IconDisplay "Port number" } Block { BlockType Outport Name "Delta L [m]" SID 2970 Position [253, 30, 267, 60] BlockRotation 270 BackgroundColor "yellow" Port "4" IconDisplay "Port number" } Line { SrcBlock "Sum1" SrcPort 1 Points [-15, 0] Branch { DstBlock "DARM" DstPort 1 } Branch { DstBlock "DARM_IN2 [m]" DstPort 1 } } Line { Labels [3, 1] SrcBlock "Sensing Function" SrcPort 1 Points [20, 0; 0, 185] DstBlock "DarmSensor" DstPort 1 } Line { SrcBlock "DARM_EXC [m]" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Actuation Function" SrcPort 1 Points [20, 0] Branch { DstBlock "Sum2" DstPort 2 } Branch { DstBlock "Delta L [m]" DstPort 1 } } Line { SrcBlock "External Delta L [m]" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum3" SrcPort 1 Points [-15, 0] Branch { Points [-90, 0; 0, -185] DstBlock "Actuation Function" DstPort 1 } Branch { DstBlock "DARM_CTRL [m]" DstPort 1 } } Line { SrcBlock "DARM_CTRL_EXC [m]" SrcPort 1 DstBlock "Sum3" DstPort 2 } Line { SrcBlock "DARM" SrcPort 1 DstBlock "Sum3" DstPort 1 } Line { SrcBlock "DarmSensor" SrcPort 1 Points [-40, 0] Branch { DstBlock "Sum1" DstPort 1 } Branch { DstBlock "DARM_IN1 [m]" DstPort 1 } } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Sum4" DstPort 2 } Line { SrcBlock "Sum4" SrcPort 1 DstBlock "Sensing Function" DstPort 1 } Line { SrcBlock "Displacement Noises" SrcPort 1 DstBlock "Sum4" DstPort 1 } Annotation { Name "SVN $Id: DARM.mdl 511 2014-02-19 16:19:23Z kiwamu.izumi@LIGO.ORG $" Position [321, 477] FontSize 18 } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . P 8 ( @ % \" $ ! 0 % 0 !@ $ , 3F%M90" " 5F%L=64 X P !@ @ $ 4 ( 0 , ! ! P!P87( #@ #@ & \" (" " !0 @ ! 0 $ !0 $ $ ! " } }